Philips Semiconductors
ATAPI CD-R block encoder/decoder
Objective specification
SAA7391
SYMBOL
n.c.
DD11
DD3
DD12
DD2
DD13
DD1
DD14
DD0
DD15
DMARQ/
DMACK
DGND7
VDDD(pad2)
DIOW
DIOR
IORDY
DMACK/
DMARQ
INTRQ
DGND8
VDDD(pad3)
IOCS16
DA1/DBWR
PDIAG
DA0
DA2/DBRD
CS0/
SCSICS
CS1
DASP
INT2
PIN
71 to 74
75
76
77
78
79
80
81
82
83
84
TYPE
−
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
DRIVE/
THRESHOLD
−
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL
85
−
−
86
−
−
87
I
L/T
88
I
L/T
89
O
AH
90
I
T
91
A
92
−
−
93
−
−
94
O
AH
95
I/O
L/T
96
I/O
AL/T
97
I/O
L/T
98
I/O
L/T
99
I/O
L/T
100
I/O
101
I/O
L/T
AH/T
102
O
L
GROUPING
DESCRIPTION
−
not connected
host
data bus; pin order of ATAPI interface
matches the pinning of the 40-way IDE
connector (slew rate limiting by control of
drive capability into capacitive load of
ATA bus)
host
−
−
host
host
host
host
host
−
−
host
host
host
host
host
host
host
host
sub-CPU
DMA request/SCSI DMA acknowledge output
(active LOW)
digital ground 7
digital peripheral supply voltage 2
write cycle write enable/control register write
input (active LOW)
read cycle read enable/control register read
input (active LOW)
device is ready to transfer data output
(active LOW)
DMA acknowledge (active LOW)/SCSI DMA
request input
host interrupt request (NB 3-state output)
digital ground 8
digital peripheral supply voltage 3
I/O port is 16-bit output (active LOW)
address wire 1/DMA from generic interface is
output from the SAA7391 (active LOW)
ATAPI passed diagnostics input/output
(active LOW)
address wire 0 input/output
address wire 2/DMA from generic interface is
input to the SAA7391 (active LOW)
chip select 1FX/generic interface chip select
(active LOW)
chip select 3FX input/output (active LOW)
device active slave present input/output
(active LOW)
sub-CPU interrupt output from the SAA7391
drive block and UART
1997 Aug 01
8