HT7033A Ver la hoja de datos (PDF) - Holtek Semiconductor

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Fabricante

HT7033A

Voltage Detector

Holtek Semiconductor 

HT7050A

Symbol

Parameter

VDET

VHYS

IDD

VDD

IOL

DVDET

DTa

Hi®Lo Detectable Voltage

Lo®Hi Detectable Voltage

Hysteresis Width

Operating Current

Operating Voltage

Output Sink Current

Temperature Coefficient

HT7070A

Symbol

Parameter

VDET

VHYS

IDD

VDD

IOL

DVDET

DTa

Hi®Lo Detectable Voltage

Lo®Hi Detectable Voltage

Hysteresis Width

Operating Current

Operating Voltage

Output Sink Current

Temperature Coefficient

Test Conditions

VDD

Conditions

¾

¾

¾

¾

¾

¾

8V No load

¾

¾

3.6V VOUT=0.36V

¾ 0°C<Ta<70°C

Test Conditions

VDD

Conditions

¾

¾

¾

¾

¾

¾

8V No load

¾

¾

5V VOUT=0.5V

¾ 0°C<Ta<70°C

HT70XX

Ta=25°C

Min. Typ. Max. Unit

4.75

4.845

0.02

VDET

¾

2.1

3

¾

5

5.25

0.05

VDET

4

¾

6

±0.9

5.25

V

5.775

V

0.1

VDET

V

7

mA

24

V

¾

mA

¾

mV/°C

Ta=25°C

Min. Typ. Max. Unit

6.65

6.783

0.02

VDET

¾

2.1

5

¾

7

7.35

0.05

VDET

4

¾

10

±0.9

7.35

V

8.085

V

0.1

VDET

V

7

mA

24

V

¾

mA

¾

mV/°C

Functional Description

The HT70XX series is a set of voltage detectors

equipped with a high stability voltage reference which is

connected to the negative input of a comparator¾ de-

noted as VREF in the following figure for NMOS output

voltage detector.

When the voltage drop to the positive input of the com-

parator (i,e,VB) is higher than VREF, VOUT goes high,

M1 turns off, and VB is expressed as VBH=VDD ´

(RB+RC) / (RA+RB+RC). If VDD is decreased so that VB

falls to a value less than VREF, the comparator output in-

verts from high to low, VOUT goes low, VC is high, M1

turns on, RC is bypassed, and VB becomes:

VBL=VDD´RB / (RA+RB), which is less than VBH. By so

doing, the comparator output will stay low to prevent the

circuit from oscillating when VB » VREF.

If VDD falls below the minimum operating voltage, the

output becomes undefined. When VDD goes from low to

VDD ´ RB / (RA+RB) > VREF, the comparator output and

VOUT goes high.

The detectable voltage is defined as:

VDET

(-)

=

RA + RB + RC

RB + RC

´

VREF

The release voltage is defined as:

VDET

(+)

=

RA + RB

RB

´

VREF

Rev. 1.60

6

January 14, 2003

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