3291-00 Ver la hoja de datos (PDF) - Peregrine Semiconductor
Número de pieza
componentes Descripción
Fabricante
3291-00
Peregrine Semiconductor
3291-00 Datasheet PDF : 15 Pages
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PE3291
Product Specification
Table 10. foLD Programming Truth Table
X = don’t care condition
foLD
Output State
C14
(PLL1F0)
C13
(PLL1LD)
C24
(PLL2F0)
C23
(PLL2LD)
Disabled1
0
0
0
0
PLL 1 Lock detect2 (LD1)
0
1
0
0
PLL2 Lock detect2 (LD2)
0
0
0
1
PLL1 / PLL2 Lock detect2
0
1
0
1
PLL1 Reference divider output (fc1)
1
X
0
0
PLL2 Reference divider output (fc2)
0
X
1
0
PLL1 Programmable divider output (fp1)
1
X
0
1
PLL2 Programmable divider output (fp2)
0
X
1
1
Serial data out
1
0
1
0
Reserved
1
0
1
1
Reserved
1
1
1
0
Counter reset3
1
1
1
1
Note: 1. When the foLD is disabled the output is a CMOS LOW.
2. Lock detect indicates when the VCO frequency is in “lock”. When PLL1 is in lock and PLL1 lock detect is selected, the foLD pin will be HIGH
with narrow pulses LOW. When PLL2 is in lock and PLL2 lock detect is selected, the foLD pin will be HIGH with narrow pulses LOW. When
PLL1 / PLL2 lock detect is selected the foLD pin will be HIGH with narrow pulses LOW only when both PLL1 and PLL2 are in lock.
3. The counter reset state when activated resets all counters. Upon removal of the reset, counters M, A, and F resume counting in close
alignment with the R counter (the maximum error is one prescaler cycle). The reset bits can be activated to allow smooth acquisition upon
powering up.
Programming the FlexiPower voltage
The PE3291 can be programmed to internally regulate down from the VDD
voltage to supply the FlexiPower voltage, as shown in Table 11. This is
implemented by programming P2, P1 (S18 & S16 - address 1,0). When
programmed with 0,0 external voltage supplies must be provided to the
part at pins VDD1 and VDD2. When using internal regulation, the FlexiPower
supply pins should be left grounded.
Table 11. FlexiPower Voltage Regulation Programming
P2 P1 FlexiPower 1 voltage FlexiPower 2 voltage
(RF PLL1)
(IF PLL2)
00
No regulation (FlexiPower externally provided)
01
Low power
Low power
10
High speed
Low power
11
High speed
High speed
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 10 of 15
Document No. 70-0009-04 │ UltraCMOS™ RFIC Solutions
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