VT98521M Ver la hoja de datos (PDF) - Vaishali Semiconductor
Número de pieza
componentes Descripción
Fabricante
VT98521M Datasheet PDF : 5 Pages
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VT98521
AC Characteristics
Table 6 AC Characteristics
VDD = 3V to 3.6V over the operating temperature range
Symbol
Parameter
fosc
Input Crystal Frequency
fin
Input clock frequency
fout
Output Frequency,
tr
Output Clock Rise Time
tf
Output Clock Fall Time
tod
Output Clock Duty Cycle
Condition
0.8 to 2.0V
2.0 to 0.8V
1.5 V up to 160 MHz
Min Typ Max Units
5
27 MHz
5
50 MHz
24
220 MHz
1
ns
1
ns
45 49 to 51 55
%
160 MHz to 220 MHz 40
60
%
TPZH, TPZL
TPHZ, TPLZ
tjit (abs)
tjit (sigma)
PLL Bandwidth
Output Enable Time, OE high to output on
Output Disable time, OE low to Tri-state
Absolute Clock period Jitter
One Sigma Clock Period Jitter
Deviation from mean
fout = 160 MHz
fout = 160 MHz
10
kHz
50 ns
50 ns
70
ps
25
ps
Note1: External Crystal Connection.
The external crystal should be connected in as close physical proximity to the VT98521 as possible. The crystal should be a
fundamental mode, parallel resonant. Do not use third overtone. External load capacitors should be fitted in accordance with the
crystal manufacturer’s specifications.
Note2: Decoupling and termination.
Decoupling capacitors of 0.01 µF and 0.1 µF should be connected between VDD and Ground. Capacitors should be mounted as
close to the chip as possible. A 33Ω termination resistor may be connected in series with the clock output in order to minimize ringing
and reflections.
Figure 3. External Crystal Connection Block Diagram
Crystal
X2
X1
CX2
3C3Xp1 F
CX1
External Crystal
Load Capacitors
OE
XTAL OSC
PLL
CLPOLLCK
GEN.
CLK3
106.25MHz
2002-02-25
Vaishali Semiconductor
Page 4
www.vaishali.com
747 Camden Avenue, Suite C Campbell
CA 95008
Ph. 408.377.6060
MDST-0017-02
Fax 408.377.6063
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