LTC1649 Ver la hoja de datos (PDF) - Linear Technology
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LTC1649 Datasheet PDF : 16 Pages
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LTC1649
APPLICATIONS INFORMATION
MOSFET Gate Drive
The LTC1649 is designed to operate from supplies as low
as 2.7V while using standard 5V logic-level N-channel
external MOSFETs. This poses somewhat of a challenge—
from as little as 2.7V, the LTC1649 must provide a 0V to
5V signal to the lower MOSFET, Q2, while the upper
MOSFET, Q1, requires a gate drive signal that swings from
0V to (VIN + 5V). The LTC1649 addresses this situation
with two specialized circuits. An onboard charge pump
boosts the input voltage at VIN to a regulated 5V at CPOUT.
This 5V supply is used to power the PVCC2 pin, which in
turn supplies 5V gate drive to Q2. This 5V supply is also
used to power the VCC pin, which allows the internal drive
circuitry to interface to the boosted driver supplies.
Gate drive for the top N-channel MOSFET, Q1, is supplied
by PVCC1. This supply must reach VIN + 5V while Q1 is on.
Conveniently, the switching node at the source of Q1 rises
to VIN whenever Q1 is on. The LTC1649 uses this fact to
generate the required voltage at PVCC1 with a simple
external charge pump as shown in Figure 2. This circuit
charges the flying capacitor C2 to the 5V level at CPOUT
when the switching node is low. As the top MOSFET turns
on, the switching node begins to rise to VIN, and the PVCC1
is pulled up to VIN + 5V by C2. The 93% maximum duty
cycle (typical) means the switching node at the source of
Q1 will return to ground during at least 7% of each cycle,
ensuring that the charge pump will always provide ad-
equate gate drive to Q1.
DCP
+
10µF CPOUT PVCC2 PVCC1
G1
G2
VIN
1µF
Q1
L1
VOUT
+
Q2
COUT
LTC1649
1649 F02
Figure 2. PVCC1 Charge Pump
Synchronous Operation
The LTC1649 uses a synchronous switching architecture,
with MOSFET Q2 taking the place of the diode in a classic
buck circuit (Figure 3). This improves efficiency by reduc-
ing the voltage drop and the resultant power dissipation
across Q2 to VON = (I)(RDS(ON)(Q2)), usually much lower
than VF of the diode in the classical circuit. This more than
offsets the additional gate drive required by the second
MOSFET, allowing the LTC1649 to achieve efficiencies in
the mid-90% range for a wide range of load currents.
Another feature of the synchronous architecture is that
unlike a diode, Q2 can conduct current in either direction.
This allows the output of a typical LTC1649 circuit to sink
current as well as sourcing it while remaining in regula-
tion. The ability to sink current at the output allows the
LTC1649 to be used with reactive or other nonconventional
loads that may supply current to the regulator as well as
drawing current from it.
VIN
CONTROLLER
Q1
D1
VOUT
1649 F03a
Figure 3a. Classical Buck Architecture
VIN
Q1
CONTROLLER
Q2
VOUT
1649 F03b
Figure 3b. Synchronous Buck Architecture
7
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