HI2325 Ver la hoja de datos (PDF) - Intersil

Número de pieza

componentes Descripción

Fabricante

HI2325

3.3V Dual 8-Bit, 40MSPS A/D Converter with Internal Reference and Digital Clamp

Intersil 

Pin Descriptions

PIN NO.

SYMBOL

46, 47, 48, 1- 5

A0 - A7

8 - 15

B0 - B7

6, 7

DVDD

16

DVSS

17

2S/B

18, 19, 20

REF0 ~ 2

21

TEST

22, 25

22, 25, 36

23

38

24

37

29

32

30

31

26

35

27

34

28, 33, 39

40

DVSS

AVSS

BRBS

ARBS

BRB

ARB

BRT

ART

BRTS

ARTS

BIO

AIO

BIN

AIN

AVDD

STB

41

SEL

42

CLE

43

CLP

44

CLK

HI2325

I/O

EQUIVALENT CIRCUIT

DESCRIPTION

O

Digital Output. A0(LSB) - A7(MSB)

O

Digital Output. B0(LSB) - B7(MSB)

Digital power supply.

Digital ground.

I

Pull-down resistors are Selects output code.

incorporated.

H: 2’s Compliment Code L: Binary Code

I

Pull-down resistors are Determines the clamp circuit reference data. See the table “Digital

incorporated.

Clamp Reference Level”.

I

Pull-down resistors are Normally open.

incorporated.

Digital ground.

Analog ground.

Shorting these pins to AVSS generates voltage of about 0.5V at the

BRB and ARB pins.

Reference voltage (bottom).

Reference voltage (top).

Shorting these pins to AVDD generates voltage of about 2.5V at the

BRT and ART pins.

O

Analog output. The digital clamp circuit comprises a D/A converter

whose outputs are available on these pins.

I

Analog input.

Analog power supply.

I

Pull-down resistors are Stand-by input.

incorporated.

H: Stand-by mode L: Operation mode.

I

Pull-down resistors are Controls the CLP signal polarity.

incorporated.

H: CLP is High active L: CLP is Low active.

I

Pull-down resistors are Clamp enable input.

incorporated.

H: Enable L: Disable.

I

Pull-down resistors are Clamp pulse input. The polarity can be set to either High or Low by

incorporated.

setting SEL.

I

Pull-down resistors are Clock input.

incorporated.

3

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