MU9C3640L-90TZC Ver la hoja de datos (PDF) - Music Semiconductors
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MU9C3640L-90TZC Datasheet PDF : 20 Pages
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LIST-XL
GENERAL DESCRIPTION
The MUSIC LIST-XL family consists of 256 word and 512
word by 64-bit content-addressable memory (CAM), ideal
for time critical applications requiring intensive list processing
where space and cost are important.
Content-addressable memories, also known as associative
memories, operate in the converse way to random access
memories (RAM). In a RAM, the input to the device is an
address and the output is the data stored at that address. In a
CAM, the input is a data sample and the output is a flag to
indicate a match and the address of the matching data. As a
result, a CAM searches large databases for matching data in a
short, constant time period, no matter how many entries are in
the database. The ability to search data words up to 64 bits
wide allows large address spaces to be searched rapidly and
efficiently. A patented architecture links each CAM entry to
associated data and makes this data available for use after a
successful compare operation.
The MUSIC LIST-XL is an inexpensive powerful solution for
any application having to retrieve or translate data in a fast,
time deterministic manner. It is well suited to handle and speed
up functions usually done in software, such as data caches,
branch tables, LAN address processing, data translations, high
speed data filters, and algorithms having to search, recognize,
and make decisions on data or a data subset.
OPERATIONAL OVERVIEW
To use the LIST-XL, the user loads the data into the
Comparand register, which is automatically compared to all
valid CAM locations. The device then indicates whether or
not one or more of the valid CAM locations contains data
that matches the target data. Two validity bits at each memory
location determines the status of each CAM location. The
two bits are encoded to render four validity conditions: Valid,
Skip, Empty, and Random Access, as shown in Table 1. The
memory can be partitioned into CAM and associated RAM
segments on 16-bit boundaries, but by using one of the two
available mask registers, the CAM/RAM partitioning can be
set at any arbitrary size between zero and 64 bits.
The LIST-XL’s internal data path is 64 bits wide for rapid
internal comparison and data movement. Loading data to the
Control, Comparand, and Mask registers automatically triggers
a compare. Compares may also be initiated by a command to
the device. Associated RAM data is available immediately
after a successful compare operation. The Status register reports
the results of compares including all flags and addresses. Two
Mask registers are available and can be used in two different
ways, to mask comparisons or to mask data writes. The random
access validity type (see Table 1) allows additional masks to
be stored in the CAM array where they may be retrieved rapidly.
A simple three-wire control interface and commands
loaded into the Instruction decoder control the device.
A powerful instruction set increases the control flexibility
and minimizes software overhead. These and other
features make the LIST-XL a powerful associative
memory that drastically reduces search delays.
Skip Bit
0
0
1
1
Empty Bit
0
1
0
1
Validity Type
Valid
Empty
Skip
RAM
Table 1: Validity Bits vs. Validity Types
/W
LOW
LOW
HIGH
HIGH
Rev. 2
/CM
Cycle Type
LOW
Command Write Cycle
HIGH
Data Write Cycle
LOW
Command Read Cycle
HIGH
Data Read Cycle
Table 2: I/O Cycles
2
DQ4 1
24
DQ5 2
23
V CC
3
22
G ND 4 32-p3 i2n-pLinQFP 21
G ND 5 (Top View) 20
DQ6 6
19
DQ7 7
18
NC 8
17
/MM
/MF
V CC
G ND
/R ESET
V CC
/E
/W
Pinout Diagram
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