AS4LC1M16S1(2000) Ver la hoja de datos (PDF) - Alliance Semiconductor

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Fabricante

AS4LC1M16S1
(Rev.:2000)

3.3V 2M × 8/1M × 16 CMOS synchronous DRAM

Alliance Semiconductor 

AS4LC2M8S1

AS4LC1M16S1

Mode register fields

Address

Function

† RFU = 0 during MRS cycle.

Write burst length

A9

Length

0

Programmed

burst length

1 Single burst

Register programmed with MRS

A11~A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

RFU† WBL

TM

CAS latency

BT

Burst length

Burst type

A3

Type

0

Sequential

1

Interleaved

Test mode

A8 A7

Type

0 0 Mode register set

01

Reserved

10

Reserved

11

Reserved

CAS latency

A6 A5 A4 Latency

00

0 Reserved

00

1

1

01

0

2

01

1

3

1X

X Reserved

Burst sequence (burst length = 4)

Initial address

A1

A0

0

0

0

0

1

1

1

0

2

1

1

3

Burst sequence (burst length = 8)

Initial address

A2

A1

A0

0

0

0

01

0

0

1

12

0

1

0

23

0

1

1

34

1

0

0

45

1

0

1

56

1

1

0

67

1

1

1

70

A2

0

0

0

0

1

1

1

1

Sequential

1

2

3

2

3

0

3

0

1

0

1

2

Sequential

234567

345670

456701

567012

670123

701234

012345

123456

Burst length

A1

A0

BT = 0 BT = 1

0

0

1

1

0

1

2

2

1

0

4

4

1

1

8

8

0

0

Reserved Reserved

0

1

Reserved Reserved

1

0

Reserved Reserved

1

1

Full page Reserved

Interleave

0

1

2

3

1

0

3

2

2

3

0

1

3

2

1

0

Interleave

01234567

10325476

23016745

32107654

45670123

54761032

67452301

76543210

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