Philips Semiconductors
Dual N-channel dual gate MOS-FET
Product specification
BF1203
handbook,6h0alfpage
IG1
(µA)
40
20
MCD943
VGG = 5 V
4.5 V
4V
3.5 V
3V
0
0
2
4
6
VG2-S (V)
Amplifier a
VDS = 5 V; Tj = 25 °C.
RG1 = 62 kΩ (connected to VGG); see Fig.35.
Fig.11 Gate 1 current as a function of gate 2
voltage; typical values.
0
handgbaoionk, halfpage
reduction
(dB)
−10
MCD944
−20
−30
−40
−50
0
1
2
Amplifier a
VDS = 5 V; VGG = 5 V; RG1 = 62 kΩ;
f = 50 MHz; Tamb = 25 °C.
3
4
VAGC (V)
Fig.12 Typical gain reduction as a function of the
AGC voltage; see Fig.35.
handboo1k,2h0alfpage
Vunw
(dBµV)
110
MCD945
100
90
80
0
10
20
30
40
50
gain reduction (dB)
Amplifier a
VDS = 5 V; VGG = 5 V; RG1 = 62 kΩ; f = 50 MHz;
funw = 60 MHz; Tamb = 25 °C.
Fig.13 Unwanted voltage for 1% cross-modulation
as a function of gain reduction; typical
values; see Fig.35.
20
handbook, halfpage
ID
(mA)
16
MCD946
12
8
4
0
0
10
20
30
40
50
gain reduction (dB)
Amplifier a
VDS = 5 V; VGG = 5 V; RG1 = 62 kΩ;
f = 50 MHz; Tamb = 25 °C.
Fig.14 Drain current as a function of gain
reduction; typical values; see Fig.35.
2001 Apr 25
8