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BD8963EFJ(2010) Ver la hoja de datos (PDF) - ROHM Semiconductor

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BD8963EFJ Datasheet PDF : 18 Pages
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BD8963EFJ
Technical Note
4. Determination of RCOMP, CCOMP that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
A
Gain
[dB] 0
0
Phase
[deg]
-90
fp(Min.)
fp(Max.)
IOUTMin.
IOUTMax.
fz(ESR)
fp=
1
2π×RO×CO
fz(ESR)=
1
2π×ESR×CO
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
fp(Min.)=
1
2π×ROMax.×CO
[Hz]with lighter load
Fig.28 Open loop gain characteristics
fp(Max.)=
1
2π×ROMin.×CO
[Hz] with heavier load
A
Gain
[dB]
0
0
Phase
[deg]
-90
fz(Amp.)
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the pole
frequency while the zero frequency does not change. (This is
because when the capacitance is doubled, the capacitor ESR
reduces to half.)
fz(Amp.)=
1
2π×RCOMP×CCOMP
Fig.29 Error amp phase compensation characteristics
VCC
Cin
L
EN
VCC
SW
VOUT
VOUT
ADJ
ESR
RO
COMP GND
CO
RCOMP
CCOMP
Fig.30 Typical application
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
fz(Amp.)= fp(Min.)
1
2π×RCOMP×CCOMP
=
1
2π×ROMax.×CO
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
11/17
2010.06 - Rev.A

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