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ATA6621 Ver la hoja de datos (PDF) - Atmel Corporation

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ATA6621 Datasheet PDF : 27 Pages
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2. Pin Configuration
Figure 2-1. Pinning QFN20
20 19 18 17 16
EN 1
PTRIG 2
NTRIG 3
WAKE 4
GND 5
ATA6621
MLP 5 mm × 5 mm
0.65 mm pitch
20 lead
15 MODE
14 TM
13 WD_OSC
12 NRES
11 TXD
6 7 8 9 10
ATA6621
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Description
Symbol Function
EN
Enables the device into Normal Mode
PTRIG High-level watchdog trigger input from microcontroller; if not needed, leave open or connect to GND
NTRIG Low-level watchdog trigger input from microcontroller; if not needed, leave open or connect to VCC
WAKE High-voltage input for local wake-up request; if not needed, connect to VS
GND
System ground
NC
Not connected
LIN
LIN bus line input/output
NC
Not connected
RXD
Receive data output
NC
Not connected
TXD
Transmit data input; active low output (strong pull down) after a local wake-up request
NRES Output undervoltage and watchdog reset
WD_OSC External resistor for adjustable watchdog timing
TM
For factory testing only (tie to ground)
MODE For debug mode, high watchdog off, low watchdog on
GND
Additional ground
TEMP Chip temperature output pin; if not needed connect to GND
PVCC 5V regulator sense input pin
VCC
5V regulator output/driver pin
VS
Battery supply
Backside Heat slug is connected to GND (pin 5)
3
4887D–AUTO–12/06

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