AT89S52-24AC Ver la hoja de datos (PDF) - Atmel Corporation
Número de pieza
componentes Descripción
Fabricante
AT89S52-24AC Datasheet PDF : 39 Pages
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Figure 16-2. External Clock Drive Configuration
NC
XTAL2
EXTERNAL
OSCILLATOR
SIGNAL
XTAL1
GND
Table 16-1. Status of External Pins During Idle and Power-down Modes
Mode
Program
Memory
ALE
PSEN PORT0 PORT1 PORT2
Idle
Internal
1
1
Data
Data
Data
Idle
External
1
1
Float
Data Address
Power-down
Internal
0
0
Data
Data
Data
Power-down
External
0
0
Float
Data
Data
PORT3
Data
Data
Data
Data
17. Program Memory Lock Bits
The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P)
to obtain the additional features listed in Table 17-1.
Table 17-1. Lock Bit Protection Modes
Program Lock Bits
LB1 LB2 LB3 Protection Type
1
U
U
U No program lock features
MOVC instructions executed from external program memory
2
P
U
U
are disabled from fetching code bytes from internal memory, EA
is sampled and latched on reset, and further programming of
the Flash memory is disabled
3
P
P
U Same as mode 2, but verify is also disabled
4
P
P
P Same as mode 3, but external execution is also disabled
When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset.
If the device is powered up without a reset, the latch initializes to a random value and holds that
value until reset is activated. The latched value of EA must agree with the current logic level at
that pin in order for the device to function properly.
20 AT89S52
1919C–MICRO–3/05
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