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AT89S51-24 Ver la hoja de datos (PDF) - Atmel Corporation

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AT89S51-24 Datasheet PDF : 32 Pages
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AT89S51
Table 5-1. AT89S51 SFR Map and Reset Values
0F8H
0F0H
B
00000000
0E8H
0E0H
ACC
00000000
0D8H
0D0H
PSW
00000000
0C8H
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C0H
0C7H
0B8H
0B0H
0A8H
0A0H
98H
90H
88H
80H
IP
XX000000
P3
11111111
IE
0X000000
P2
11111111
SCON
00000000
P1
11111111
TCON
00000000
P0
11111111
SBUF
XXXXXXXX
TMOD
00000000
SP
00000111
AUXR1
XXXXXXX0
TL0
00000000
DP0L
00000000
TL1
00000000
DP0H
00000000
TH0
00000000
DP1L
00000000
TH1
00000000
DP1H
00000000
WDTRST
XXXXXXXX
AUXR
XXX00XX0
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
PCON
0XXX0000
87H
User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new fea-
tures. In that case, the reset or inactive values of the new bits will always be 0.
Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the five
interrupt sources in the IP register.
7
2487C–MICRO–03/05

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