28F008C3 Ver la hoja de datos (PDF) - Intel
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28F008C3 Datasheet PDF : 59 Pages
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3 VOLT ADVANCED+ BOOT BLOCK
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1.2 Product Overview
Intel provides secure low voltage memory solutions
with the Advanced Boot Block family of products. A
new block locking feature allows instant
locking/unlocking of any block with zero-latency. A
128-bit protection register allows unique flash
device identification.
Discrete supply pins provide single voltage read,
program, and erase capability at 2.7 V while also
allowing 12 V VPP for faster production
programming. Easy-12 V, a new feature designed
to reduce external logic, simplifies board designs
when combining 12 V production programming with
2.7 V in-field programming.
The 3 Volt Advanced+ Boot Block flash memory
products are available in either x8 or x16 packages
in the following densities: (see Section 6, Ordering
Information)
• 8-Mbit (8,388,608 bit) flash memories organized
as either 512 Kwords of 16 bits each or 1024
Kbytes or 8 bits each.
• 16-Mbit (16,777,216 bit) flash memories
organized as either 1024 Kwords of 16 bits
each or 2048 Kbytes of 8 bits each.
• 32-Mbit (33,554,432 bit) flash memories
organized as either 2048 Kwords of 16 bits
each or 4096 Kbytes of 8 bits each.
Eight 8-KB parameter blocks are located at either
the top (denoted by -T suffix) or the bottom (-B
suffix) of the address map in order to accommodate
different microprocessor protocols for kernel code
location. The remaining memory is grouped into 64-
Kbyte main blocks.
All blocks can be locked or unlocked instantly to
provide complete protection for code or data. (see
Section 3.3 for details).
The Command User Interface (CUI) serves as the
interface between the microprocessor or
microcontroller and the internal operation of the
flash memory. The internal Write State Machine
(WSM) automatically executes the algorithms and
timings necessary for program and erase
operations, including verification, thereby
unburdening the microprocessor or microcontroller.
The status register indicates the status of the WSM
by signifying block erase or word program
completion and status.
Program and erase automation allows program and
erase operations to be executed using an industry-
standard two-write command sequence to the CUI.
Program operations are performed in word or byte
increments. Erase operations erase all locations
within a block simultaneously. Both program and
erase operations can be suspended by the system
software in order to read from any other block. In
addition, data can be programmed to another block
during an erase suspend.
The 3 Volt Advanced+ Boot Block flash memories
offer two low power savings features: Automatic
Power Savings (APS) and standby mode. The
device automatically enters APS mode following the
completion of a read cycle. Standby mode is
initiated when the system deselects the device by
driving CE# inactive. Combined, these two power
savings features significantly reduce power
consumption.
The device can be reset by lowering RP# to GND.
This provides CPU-memory reset synchronization
and additional protection against bus noise that
may occur during system reset and power-up/down
sequences (see Section 3.5 and 3.6).
Refer to the DC Characteristics Section 4.4 for
complete current and voltage specifications. Refer
to the AC Characteristics Sections 4.5 and 4.6, for
read and write performance specifications. Program
and erase times and shown in Section 4.7.
2.0 PRODUCT DESCRIPTION
This section provides device pin descriptions and
package pinouts for the 3 Volt Advanced+ Boot
Block flash memory family, which is available in 40-
Lead TSOP (x8, Figure 1), 48-lead TSOP (x16,
Figure 2) and 48-ball µBGA packages (Figures 3
and 4).
2.1 Package Pinouts
In each diagram, upgrade pins from one density to
the next are circled.
6
PRODUCT PREVIEW
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