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AT27C256R-70JU Ver la hoja de datos (PDF) - Atmel Corporation

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AT27C256R-70JU Datasheet PDF : 13 Pages
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6. Rapid programming algorithm
A 100µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to
13.0V. Each address is first programmed with one 100µs CE pulse without verification. Then a verification/reprogramming
loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100µs pulses are
applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is
considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then
lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device
passes or fails.
Figure 6-1. Rapid programming algorithm
8
Atmel AT27C256R
0014O–EPROM–10/11

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