AT25F512A Ver la hoja de datos (PDF) - Atmel Corporation
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AT25F512A Datasheet PDF : 19 Pages
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3345F–FLASH–11/06
AT25F512A
Table 9. WPEN Operation
WPEN WP WEN ProtectedBlocks
0
X
0
Protected
0
X
1
Protected
1
Low
0
Protected
1
Low
1
Protected
X
High
0
Protected
X
High
1
Protected
UnprotectedBlocks
Protected
Writeable
Protected
Writeable
Protected
Writeable
Status Register
Protected
Writeable
Protected
Protected
Protected
Writeable
READ (READ): Reading the AT25F512A via the SO pin requires the following
sequence. After the CS line is pulled low to select a device, the Read instruction is
transmitted via the SI line followed by the three-byte address to be read (see Table 10
on page 10). Upon completion, any data on the SI line will be ignored. The data (D7–D0)
at the specified address is then shifted out onto the SO line. If only one byte is to be
read, the CS line should be driven high after the data comes out. The Read instruction
can be continued since the byte address is automatically incremented and data will con-
tinue to be shifted out. When the highest address is reached, the address counter will
roll over to the lowest address, allowing the entire memory to be read in one continuous
READ instruction.
PROGRAM (PROGRAM): In order to program the AT25F512A, two separate instruc-
tions must be executed. First, the CS line is pulled low to select the device, the device
must be write enabled via the WREN instruction. Then, the Program instruction can be
executed.
The Program instruction requires the following sequence. After the CS line is pulled low
to select the device, the PROGRAM instruction is transmitted via the SI line followed by
the three-byte address and the data (D7–D0) to be programmed (see Table 10 on page
10). Programming will start after the CS pin is brought high. The low-to-high transition of
the CS pin must occur during the SCK low time immediately after clocking in the D0
(LSB) data bit (assuming mode 0 operation). During an internal self-timed programming
cycle, all commands will be ignored except the RDSR instruction.
The Ready/Busy status of the device can be determined by initiating a RDSR instruc-
tion. If Bit 0 = “1”, the program cycle is still in progress. If Bit 0 = “0”, the program cycle
has ended. Only the RDSR instruction is enabled during the program cycle.
A single PROGRAM instruction programs 1 to 128 consecutive bytes within a page if it
is not write protected. The starting byte could be anywhere within the page. When the
end of the page is reached, the address will wrap around to the beginning of the same
page. If the data to be programmed are less than a full page, the data of all other bytes
on the same page will remain unchanged. If more than 128 bytes of data are provided,
the address counter will roll over on the same page and the previous data provided will
be replaced. The same byte cannot be reprogrammed without erasing the whole sector
first. The AT25F512A will automatically return to the write disable state at the completion
of the program cycle.
Note:
If the device is not write enabled (WREN), the device will ignore the WRITE instruction
and will return to the standby state when CS is brought high. A new CS falling edge is
required to re-initiate the serial communication.
9
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