AS7C33256PFS32A Ver la hoja de datos (PDF) - Alliance Semiconductor

Número de pieza

componentes Descripción

Fabricante

AS7C33256PFS32A

3.3V 256K × 32/36 pipelined burst synchronous SRAM

Alliance Semiconductor 

AS7C33256PFS32A

AS7C33256PFS36A

®

Timing characteristics for 3.3 V I/O operation

Parameter

Clock frequency

Cycle time

Clock access time

Output enable low to data valid

Clock high to output low Z

Data output invalid from clock high

Output enable low to output low Z

Output enable high to output high Z

Clock high to output high Z

Output enable high to invalid output

Clock high pulse width

Clock low pulse width

Address setup to clock high

Data setup to clock high

Write setup to clock high

Chip select setup to clock high

Address hold from clock high

Data hold from clock high

Write hold from clock high

Chip select hold from clock high

ADV setup to clock high

ADSP setup to clock high

ADSC setup to clock high

ADV hold from clock high

ADSP hold from clock high

ADSC hold from clock high

1 See “Notes” on page 17

Symbol

fMax

tCYC

tCD

tOE

tLZC

tOH

tLZOE

tHZOE

tHZC

tOHOE

tCH

tCL

tAS

tDS

tWS

tCSS

tAH

tDH

tWH

tCSH

tADVS

tADSPS

tADSCS

tADVH

tADSPH

tADSCH

–166

Min Max

– 166

6

–

- 3.5

– 3.5

0

–

1.5 –

0

–

– 3.5

– 3.5

0

–

2.4 –

2.3 –

1.5 –

1.5 –

1.5 –

1.5 –

0.5 –

0.5 –

0.5 –

0.5 –

1.5 –

1.5 –

1.5 –

0.5 –

0.5 –

0.5 –

–133

Min Max

– 133

7.5 –

- 4.0

– 4.0

0

–

1.5 –

0

–

– 4.0

– 4.0

0

–

2.5 –

2.5 –

1.5 –

1.5 –

1.5 –

1.5 –

0.5 –

0.5 –

0.5 –

0.5 –

1.5 –

1.5 –

1.5 –

0.5 –

0.5 –

0.5 –

Unit

MHz

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

Notes1

2,3,4

2

2,3,4

2,3,4

2,3,4

5

5

6

6

6,7

6,8

6

6

6,7

6,8

6

6

6

6

6

6

11/30/04, v.3.1

Alliance Semiconductor

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