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AS2830AR-1.5 Ver la hoja de datos (PDF) - Signal Processing Technologies

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AS2830AR-1.5 Datasheet PDF : 6 Pages
1 2 3 4 5 6
AS2830
Basic Adjustable Regulator
VIN
AS2830
VOUT
VREF
R1
IADJ
50µA
R2
VOUT = VREF * ( 1 + R2/R1) + IADJ * R2
VIN
5V
C1
10uF
AS2830
VOUT
3.3V
C2
10uF
Basic Fixed Regulator
Fig.2 Basic Adjustable Regulator
Output Voltage
Consider Figure 2. The resistance R1 generates a constant
current flow, normally the specified load current of 10mA.
This current will go through the resistance R2 to set the overall
output voltage. The current IADJ is very small and constant.
Therefore its contribution to the overall output voltage is very
small and can generally be ignored.
Load Regulation
Parasitic line resistance can degrade load regulation. In order
not to affect the behavior of the regulator, it is best to connect
directly the R1 resistance from the resistor divider to the case,
and not to the load. For the same reason, it is best to connect
the resistor R2 to the Negative side of the load.
Output Voltage
The fixed voltage LDO voltage regulators are simple to use
regulators since the VOUT is preset to the specifications. It is
important however, to provide the proper output capacitance
for stability and improvement. For most operating conditions
a capacitance of 22uF tantalum or 100uF electrolytic will
ensure stability and prevent oscillation.
RP Parasitic Line
VIN
AS2830
Resistance
Connect R1 to
Case of Regulator
R1
RL
R2
Connect R2 to Load
Fig.3 Basic Adjustable Regulator
Rev. 10/2/00

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