AS1543 Ver la hoja de datos (PDF) - austriamicrosystems AG
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AS1543 Datasheet PDF : 29 Pages
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AS1543/44
Data Sheet - Pinout
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
VIN3 16
VIN2 17
VIN1 18
VIN0 19
N/C 20
AS1543
10 REFIN
9 VDD
8 GND
7 CSN
6 DIN
VIN3 16
VIN2 17
VIN1 18
VIN0 19
N/C 20
AS1544
10 REFIN
9 VDD
8 GND
7 CSN
6 DIN
Pin Descriptions
Table 1. Pin Descriptions
Pin Number Pin Name
Description
Analog Inputs. 8/4 single-ended or 4/2 fully-differential analog input channels that are
multiplexed into the track-and-hold circuitry. Input channels are selected by using address
bits ADDR3:ADDR0 (page 14) of the control register. The address bits in conjunction with
bits SEQ (page 14) and SHADOW (page 14) allow the sequence register to be
VINx programmed. The bit SE/FDN (page 14) of the control register selects single-ended or
fully-differential conversion mode. In case of single-ended mode the input range can
extend from [0V to VREFIN] or [0V to 2 x VREFIN]. In case of fully-differential mode the
differential input range can extend from [-VREFIN/2 to +VREFIN/2] or [-VREFIN to +VREFIN].
Note: Unused inputs should be connected to AGND to avoid noise.
REFIN
Reference Input. An external reference must be applied to this input. The voltage range
for the external reference is 2.5V ±1% for specified performance.
SCLK
Serial Clock. Provides the serial clock for accessing data from the part. This clock input is
also used as the clock source for the ADC conversion process
VDD
2.7 to 5.25V Supply Input. For the [0V to 2 x VREFIN] range, VDD must be between 4.75
and 5.25V
(see Figure 2)
VDRIVE
Logic Power Supply Input. The voltage supplied at this pin determines the operating
voltage of the AS1543/44 serial interface. VDRIVE ≤ VDD required.
Digital Output. The ADC conversion result is provided serially on this output. Data bits are
clocked out on the falling edge of SCLK. The data stream consists of four address bits
DOUT indicating the corresponding conversion channel, followed by 12 bits of conversion data
(MSB first). Output coding may be selected as straight binary or two’s complement
depending on the setting of bit CODING (page 14).
Digital Input. Data is clocked into to the AS1543/44 control register on this input (see
DIN Control Register on page 14).
Chip Select. Active low input. Initiates conversions and also is used to frame the serial
CSN data transfer.
Analog Ground. Ground reference point for all analog circuitry. All analog input signals
AGND and any external reference signal should be referenced to pin AGND.
Note: AGND, GND and DGND pins must be connected together.
DGND
Digital Logic Ground. Ground reference point for the VDRIVE logic power supply input.
VDRIVE should be decoupled to pin DGND.
GND
Supply Ground. Ground reference point for the VDD supply input. The supply input VDD
should be decoupled to pin GND.
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