AS1521-BTSU Ver la hoja de datos (PDF) - austriamicrosystems AG

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AS1521-BTSU

10-Bit, Single-Supply, Low-Power, 400/300ksps, 8-Channel A/D Converters

austriamicrosystems AG 

AS1520/AS1521

Data Sheet - Electrical Characteristics

Table 3. AS1520 Electrical Characteristics (Continued)

Symbol

Parameter

Conditions

Min

CBYPREF

ADJ

Capacitive Bypass at

REFADJ

0.01

REFADJ Output Voltage

REFADJ Input Range

For small adjustments, from 1.22V

REFADJ Buffer Disable

Threshold

To power down the internal reference

1.4

Buffer Voltage Gain

External Reference: Reference buffer disabled, reference applied to pin REF

REF Input Voltage Range 8

1.0

REF Input Current

Digital Inputs: DIN, SCLK, CSN

VINH

Input High Voltage

VREF = 2.50V,

fSCLK = 6.4MHz

VREF = 2.50V, fSCLK = 0

Power-Down, fSCLK = 0

0.7 x

VDD

VINL

Input Low Voltage

VHYST

Input Hysteresis

IIN

Input Leakage

VIN = 0 or VDD2

-1

CIN

Input Capacitance

Digital Outputs: DOUT, SSTRB

VOL

Output Voltage Low

ISINK = 5mA

VOH

Output Voltage High

ISOURCE = 1mA

4

IL

Tri-State Leakage Current

CSN = VDD2

-10

COUT Tri-State Output Capacitance

CSN = VDD2

Power Supply

VDD1,

VDD2,

Positive Supply Voltage 9

4.5

VDD3

Normal Operation with

External Reference 10

IVDD1,

IVDD2,

IVDD3

Supply Current

VDD1 = VDD2 =

VDD3 = 5.5V

Normal Operation with

Internal Reference 10

Reduced-Power Mode 11

Full Power-Down Mode

PSR

Power-Supply Rejection

VDD1 = VDD2 = VDD3 = 5V ±10%

-2

Typ Max Units

10 µF

1.22

V

±100

mV

VDD1 -

1

V

2.045

V/V

VDD1

+

V

50mV

200 350

320 µA

5

V

0.3 x

VDD

V

0.2

V

+1 µA

5

pF

0.4 V

V

+10 µA

5

pF

5.5 V

2.8 3.3

3.3 3.8 mA

0.4 0.8

0.5

2

µA

±0.1 +2 mV

1. Tested at VDD1 = VDD2 = VDD3 = +5V, COM = GND, bit RANGE (page 15) = 1, single-ended input mode.

2. Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error

and offset error have been nulled.

3. Offset nulled.

4. Ground on channel; sinewave applied to all off channels.

5. Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty

cycle.

6. The absolute voltage range for the analog inputs (CH0:CH7, and COM) is from GND to VDD1.

7. External load should not change during conversion for specified accuracy. Guaranteed specification of 4mV/mA

is a result of production test limitations.

8. AS1520/AS1521 performance is limited by the device noise floor, typically 300µVp-p.

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