AS1161 Ver la hoja de datos (PDF) - austriamicrosystems AG
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AS1161
austriamicrosystems AG
AS1161 Datasheet PDF : 29 Pages
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AS1160/AS1161
Datasheet - Electrical Characteristics
Table 6. Serializer Switching Characteristics1
Symbol
Parameter
Conditions
Min Typ Max Unit
tDIS
DINx Setup to TCLK Time
0
ns
Figure 21 on page 13
tDIH
DINx Hold from TCLK Time
4
ns
tHZD
DO+, DO- High-to-
Tri-State Delay
1.5
5
ns
tLZD
DO+, DO- Low-to-
Tri-State Delay
tZHD
DO+, DO- Tri-State-to-
High Delay
Figure 22 on page 14 2
1.5
5
ns
1.5
5
ns
tZLD
DO+, DO- Tri-State-to-
Low Delay
1.5
5
ns
tPWDL
PWDNN minimum low time
after VDD is in regulation
Figure 23 on page 14
50
µs
tSPW
SYNC Pulse Width
Figure 25 on page 15
5x
tTCP
ns
tPLD
Serializer PLL Lock Time
Figure 24 on page 14
400 x
tTCP
ns
tSD
Serializer Delay
Figure 26 on page 15
tTCP/2
tTCP/2
+3
tTCP/2
+5
ns
f = 20MHz
tDJIT
Deterministic Jitter (p-p)
(Worst Case) ICC-Pattern
Figure 32 on page 18
f = 66MHz
150
300
ps
(pp)
50
100
ps
(pp)
tRJIT
Random Jitter
(Worst Case) ICC-Pattern
f = 20MHz
f = 66MHz
25
45
ps
8
15 (RMS)
1. Guaranteed by simulation and characterization.
2. Because the serializer is in tri-state mode, the deserializer will lose PLL lock and have to resynchronize before
data transfer.
Deserializer Electrical Characteristics
AVDD = DVDD = 3V to 3.6V, TAMB = -40°C to +85°C, RLOAD=28Ω, CLOAD = 15pF, Receiver Input Range: 0V to 2.4V,
typical values @ TAMB = +25°C and VDD = 3.3V (unless otherwise specified).
Table 7. Electrical Characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
Deserializer Bus LVDS DC Specifications (pins RI+ and RI-)
VTH
Differential Threshold High
Voltage
VTL
Differential Threshold Low
Voltage
VCM = +1.2V
+10 +75
mv
-75 -20
IIN
Input Current
VIN = 2.4V, VDD = 3.6V or 0V
-1
VIN = 0V, VDD = 3.6V or 0V
-1
+1
µA
+1
Deserializer LVCMOS/LVTTL DC Specifications (input pins PWDNN, RCKR/FN, REN, REFCLK; output pins
ROUT0:ROUT9, RCLK, LOCKN)
VIH
High Level Input Voltage
2.0
VDD V
VIL
Low Level Input Voltage
GND
0.8 V
IIN
Input Current
VIN = 0V or 3.6V
-1
+1 µA
www.austriamicrosystems.com/Interfaces-LVDS/AS1160_61
Revision 1.01
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