AS1116-BQFT(2009) Ver la hoja de datos (PDF) - austriamicrosystems AG

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AS1116-BQFT
(Rev.:2009)

64 LED Driver with Detailed Error Detection

austriamicrosystems AG 

AS1116

Datasheet - Detailed Description

Serial-Addressing Format

The AS1116 contains a 16bit SPI interface to access the internal data and control registers of the device (see Digit-

and Control-Registers on page 9). The SPI interface is driven with the rising edge of SCL. A falling edge on LD signal

indicates the beginning of an access on the SPI interface, the rising edge on LD determines an access on SPI. An

access must consist of exactly 16bits for write operation and 8bits for read operation. Timing restrictions on the SPI

interface pins are defined in Figure 18.

Table 6 shows the structure of the 16bit command word for writing data, Table 7 the 8bit command word for read oper-

ation.

D0 (write operation) / D8 (read operation) is the first bit to shift into the SPI interface after the falling edge of LD, is the

last bit to write to SPI before rising edge of LD.

At a read operation an 8bit operation is executed. At the first rising edge of SCL after the rising edge of LD D7 of

addressed register is written to SDO pin. At the next rising edge of SCL D6 is written to SDO pin. LD must be kept high

during reading data from a internal data or control register of AS1116.

Table 6. 16-Bit Serial Data Format

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

LSB

Data

MSB

Register Address (see Table 7)

0 R/W X

Figure 17. Read operation

1

8 9 10

16

SCL

LD

SDO

D7 D6 D5 D4 D3 D2 D1 D0

Figure 18. Interface Timing

LD

SCL

SDI

tCSS

tDH

tDS

D0

tCL

tCH

D1

SDO

tCSW

tCP

tCSH

tLDCK

D14

D15

tDO

Initial Power-Up

On initial power-up, the AS1116 registers are reset to their default values, the display is blanked, and the device goes

into shutdown mode. At this time, all registers should be programmed for normal operation.

Note: The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control

Register (see page 13) is set to the minimum values.

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