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AS1310-BTDT-XX2

Ultra Low Quiescent Current, Hysteretic DC-DC Step-Up Converter

austriamicrosystems AG 

AS1310

Datasheet - Detailed Description

8 Detailed Description

8.1 Hysteretic Boost Converter

Hysteretic boost converters are so called because comparators are the active elements used to determine on-off timing via current and voltage

measurements. There is no continuously operating fixed oscillator, providing an independent timing reference. As a result, a hysteretic or

comparator based converter has a very low quiescent current. In addition, because there is no fixed timing reference, the operating frequency is

determined by external component (inductor and capacitors) and also the loading on the output.

Ripple at the output is an essential operating component. A power cycle is initiated when the output regulated voltage drops below the nominal

value of VOUT (0.99 x VOUT).

lid Inductor current is monitored by the control loop, ensuring that operation is always dis-continuous.

The application circuit shown in Figure 1 will support many requirements. However, further optimization may be useful, and the following is

offered as a guide to changing the passive components to more closely match the end requirement.

a 8.1.1 Input Loop Timing

v The input loop consists of the source dc supply, the input capacitor, the main inductor, and the N-channel power switch. The on timing of the N-

channel switch is determined by a peak current measurement or a maximum on time. In the AS1310, peak current is 400mA (typ) and maximum

ill on time is 4.2µs (typ). Peak current measurement ensures that the on time varies as the input voltage varies. This imparts line regulation to the

converter.

t The fixed on-time measurement is something of a safety feature to ensure that the power switch is never permanently on. The fixed on-time is

independent of input voltage changes. As a result, no line regulation exists.

G s Figure 12. Simplified Boost DCDC Architecture

s A ent VIN

amcont 0V

L1

SW2

Q

CIN

SW1

Q

FB

IPK

GND

COUT

VOUT

RLOAD

0V

ical On time of the power switch (Faraday’s Law) is given by:

nTON = V----I--N-----–----(---I--P---K----R-L---SI--WP----K-1---+-----I---P---K---R----L---1---) sec [volts, amps, ohms, Henry]

h Applying Min and Max values and neglecting the resistive voltage drop across L1 and SW1;

Tec T = L V I ON _MIN

MIN PK _ MIN

IN _ MAX

(EQ 1)

(EQ 2)

T = L V I ON _ MAX

MAX PK _ MAX

IN _ MIN

(EQ 3)

www.austriamicrosystems.com/DC-DC_Step-Up/AS1310

Revision 1.8

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