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APL5910

1A, Ultra Low Dropout (0.12V Typical) Linear Regulator

Anpec Electronics 

APL5910

Function Description

Power-On-Reset

A Power-On-Reset (POR) circuit monitors both of supply

voltages on VCNTL and VIN pins to prevent wrong logic

controls. The POR function initiates a soft-start process

after both of the supply voltages exceed their rising POR

voltage thresholds during powering on. The POR func-

tion also pulls low the POK voltage regardless of the

output status when one of the supply voltages falls below

its falling POR voltage threshold.

Internal Soft-Start

An internal soft-start function controls rise rate of the out-

put voltage to limit the current surge during start-up. The

typical soft-start interval is about 0.6ms.

Output Voltage Regulation

An error amplifier working with a temperature-compen-

sated 0.8V reference and an output NMOS regulates out-

put to the preset voltage. The error amplifier is designed

with high bandwidth and DC gain provides very fast tran-

sient response and less load regulation. It compares the

reference with the feedback voltage and amplifies the dif-

ference to drive the output NMOS which provides load

current from VIN to VOUT.

Current-Limit Protection

The APL5910 monitors the current flowing through the

output NMOS and limits the maximum current to prevent

load and APL5910 from damages during current over-

load conditions.

Short Current-Limit Protection

The short current-limit function reduces the current-limit

level down to 0.4A (typical) when the voltage on FB pin

falls below 0.2V (typical) during current overload or short-

circuit conditions.

The short current-limit function is disabled for success-

ful start-up during soft-start interval.

the output again through initiation of a new soft-start pro-

cess after the junction temperature cools by 50oC, result-

ing in a pulsed output during continuous thermal over-

load conditions. The thermal shutdown is designed with

a 50oC hysteresis to lower the average junction tempera-

ture during continuous thermal overload conditions, ex-

tending lifetime of the device.

For normal operation, the device power dissipation should

be externally limited so that junction temperatures will

not exceed +125οC.

Enable Control

The APL5910 has a dedicated enable pin (EN). A logic

low signal applied to this pin shuts down the output. Fol-

lowing a shutdown, a logic high signal re-enables the

output through initiation of a new soft-start cycle. When

left open, this pin is pulled up by an internal current source

(5µA typical) to enable normal operation. It’s not neces-

sary to use an external transistor to save cost.

Power-OK and Delay

The APL5910 indicates the status of the output voltage by

monitoring the feedback voltage (V ) on FB pin. As the

FB

V rises and reaches the rising Power-OK voltage thresh-

FB

old (VTHPOK), an internal delay function starts to work. At the

end of the delay time, the IC turns off the internal NMOS of

the POK to indicate that the output is ok. As the VFB falls

and reaches the falling Power-OK voltage threshold, the

IC turns on the NMOS of the POK (after a debounce time

of 10µs typical).

Thermal Shutdown

A thermal shutdown circuit limits the junction tempera-

ture of APL5910. When the junction temperature exceeds

+170oC, a thermal sensor turns off the output NMOS, al-

lowing the device to cool down. The regulator regulates

Copyright © ANPEC Electronics Corp.

10

Rev. A.3 - Jun., 2009

www.anpec.com.tw

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