ST93CS56M1013TR Ver la hoja de datos (PDF) - STMicroelectronics

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ST93CS56M1013TR

2K (128 x 16) SERIAL MICROWIRE EEPROM

STMicroelectronics 

ST93CS56, ST93CS57

POWER-ON DATA PROTECTION

In order to prevent data corruption and inadvertent

write operations during power up, a Power On

Reset (POR) circuit resets all internal programming

circuitry and sets the device in the Write Disable

mode. When VCC reaches its functional value, the

device is properlyreset (in the Write Disable mode)

and is ready to decode and execute an incoming

instruction. A stable VCC must be applied before

any logic signal.

INSTRUCTIONS

The ST93CS56/57 has eleven instructions, as

shown in Table 6. Each instruction is composed of

a 2 bit op-code and an 8 bit address. Each instruc-

tion is preceded by the rising edge of the signal

applied on the Chip Select ( S) input (assuming that

the Clock C is low). The data input D is then

sampled upon the following rising edges of the

clock C until a ’1’ is sampled and decoded by the

ST93CS56/57 as a Start bit.

The ST93CS56/57 is fabricated in CMOS technol-

ogy and is therefore able to run from zero Hz (static

input signals) up to the maximum ratings (specified

in Table 5).

Read

The Read instruction (READ) outputs serial data

on the Data Output (Q). When a READ instruction

is received, the instruction and address are de-

coded and the data from the memory is transferred

into an output shift register. Adummy ’0’ bit is output

first followed by the 16 bit word with the MSB first.

Table 6. Instruction Set

Instruction

Description

W

pin (1)

PRE

pin

Op

Code

Address (1, 2)

Data

Additional

In formation

READ

Read Data from

Memory

WRITE Write Data to Memory

X

’0’

10

’1’

’0’

01

PAWRITE Page Write to Memory

’1’

’0’

11

A7-A0

A7-A0

A7-A0

Q15-Q0

D15-D0

D15-D0

Write is executed if

the address is not

inside the Protected

area

Write is executed if

all the addresses

are not inside the

Protected area

WRALL Write All Memory

Write all data if the

’1’

’0’

00 01XX XXXX D15-D0 Protect Register is

cleared

WEN

Write Enable

’1’

’0’

00 11XX XXXX

WDS

Write Disable

X

’0’

00 00XX XXXX

PRREAD Protect Register Read

Data Output =

X

’1’

10

XXXX XXXX

Q8-Q0

Protect Register

content + Protect

Flag bit

PRWRITE Protect Register Write

’1’

’1’

01

A7-A0

Data above

specified address

A7-A0 are

protected (2)

PRCLEAR Protect Register Clear

’1’

’1’

11

1111 1111

Protect Flag is also

cleared (cleared

Flag = 1)

PREN Protect Register Enable ’1’

’1’

00 11XX XXXX

PRDS Protect Register Disable ’1’

’1’

00

0000 0000

Notes: 1. X = don’t care bit.

2. Address bit A7 is not decoded by the ST93CS56/57.

OTP bit is set

permanently

6/16

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