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AP7363-25 Ver la hoja de datos (PDF) - Diodes Incorporated.

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AP7363
Application Note (continued)
Stability and Phase Margin
Any regulator that operates using a feedback loop must be compensated in such a way as to ensure adequate phase margin, which is defined as
the difference between the phase shift and -180 degrees at the frequency where the loop gain crosses unity (0 dB). For most LDO regulators, the
ESR of the output capacitor is required to create a zero to add enough phase lead to ensure stable operation. The AP7363 has an internal
compensation circuit that maintains phase margin regardless of the ESR of the output capacitorany type of capacitors can be used.
The following charts show the gain/phase plot of the AP7363 with an output of 1.2V, 10μF ceramic output capacitor, and delivering 1.5A load
current and no load. The phase margin is about 90°, which is very stable.
120
100 PHASE
80
60 GAIN
40
20
0
-20
-40
-60
-80
-100
VIN = 2.7V
VOUT = 1.2V
IL = 1.5A
COUT = 10µF CER
-120
100
1k
10k
100k
FREQUENCY(Hz)
Gain-Bandwidth Plot for 1.5A Load
140
120
100
80
60
40
20
0
-20
-40
-60
-80
1M
120
100
80
PHASE
60
40
GAIN
20
0
-20
-40
-60
-80
-100
VIN = 2.7V
VOUT = 1.2V
IL = 0A
COUT = 10µF CER
-120
100
1k
10k
100k
FREQUENCY(Hz)
Gain-Bandwidth Plot for no Load
140
120
100
80
60
40
20
0
-20
-40
-60
-80
1M
Short-Circuit Protection
When the output current at the OUT pin is higher than the current limit threshold, the current limit protection triggers and clamps the output
current to prevent overcurrent and to protect the regulator from damage due to overheating.
Thermal Shutdown Protection
Thermal protection disables the output when the junction temperature rises to approximately +170°C, which allows the device to cool down.
When the junction temperature reduces to approximately +160°C, the output circuitry is enabled again. Depending on power dissipation, thermal
resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the heat dissipation of the regulator
and protects it from damage due to overheating.
Low Quiescent Current
The AP7363, consuming only around 0.5mA for all input range, provides great power saving in portable and low-power applications.
Output Noise
This is the integrated value of the output noise over a specified frequency range. Input voltage and output load current are kept constant during
the measurement. Results are expressed in µVrms or µVHz.
The AP7363 is a low-noise regulator and requires no external noise reduction capacitor. Output voltage noise is typically 100μVrms, and overall
noise level is between 100 Hz and 100 kHz.
Noise is specified in two ways:
Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz
bandwidth). This type of noise is usually plotted on a curve as a function of frequency.
Output noise voltage is the RMS sum of spot noise over a specified bandwidth. Spot noise is measured in units µV/Hz or nV/Hz, and total
output noise is measured in µV(rms). The primary source of noise in low-dropout regulators is the internal reference.
AP7363
Document number: DS35059 Rev. 9 - 2
8 of 15
www.diodes.com
June 2018
© Diodes Incorporated

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