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DIGITAL HYBRID WITH THE Si305X DAAS

Silicon Laboratories 

AN84

DIGITAL HYBRID WITH THE Si305X DAAS

1. Introduction

This application note is a guide to understanding and

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b0

implementing the digital hybrid feature found in Si305x

DAA products. The Si305x contains an on-chip analog

hybrid that performs the 2- to 4-wire conversion and

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near-end echo cancellation. This hybrid circuit is

adjusted for each ac termination setting selected to

achieve a minimum transhybrid balance of 20 dB. The

b1

+

Si305x also offers a digital filter for additional near-end

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echo cancellation to compensate for any line

impedance mismatch. For each ac termination setting,

the eight programmable hybrid registers (Registers 45-

52) can be programmed with coefficients to increase the

cancellation under real-world line conditions. This digital

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filter can produce 10 dB or greater of near-end echo

cancellation in addition to the 20 dB from the analog

hybrid circuitry.

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1.1. Digital Hybrid Overview

Figure 1 describes the basic architecture of the digital

hybrid. It is composed of an 8-tap FIR filter. “b0” through

“b7” represent the filter coefficients in 2s complement

form. The initial 4-sample bulk delay is used to

compensate for the round trip delay through the line-

side device. This architecture is designed to delay and

filter the transmit signal to match the portion not

cancelled by the analog hybrid.

Figure 1. Digital Hybrid Structure

Figure 2 illustrates the basic signal flow of the DAA. The

digital signal has been upsampled to 16 kHz at the

digital hybrid stage. The transmit signal goes through a

digital filter, digital-to-analog converter, and analog filter

before going out on the line or being used in the analog

hybrid circuitry. After the analog hybrid, the receive

signal passes through an analog filter, analog-to-digital

converter, and digital filter before going back into the

digital hybrid. The analog hybrid path adds

approximately four samples of delay to the signal. The

digital hybrid structure matches this filter delay by

delaying the digital samples by the same amount.

AC

TX

Digital

Filters

DAC

Analog

Filters

Termination

Line Driver

Line

Digital

RX

Hybrid

@16kHz

Digital

Filters

ADC

Analog

Filters

Analog

Hybrid

Figure 2. Signal Flow Diagram

Rev. 0.6 6/07

Copyright © 2007 by Silicon Laboratories

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