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AN501 Ver la hoja de datos (PDF) - Vishay Semiconductors

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AN501 Datasheet PDF : 11 Pages
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AN501
Vishay Siliconix
ATE
A simple but accurate ATE system, as shown in Figure 18, can
be designed for testing digital processing boards.
The propagation delay time for each of the 16 digital signal
paths can be tested individually, with negligible errors due to
the very small propagation delay through the DG535/536.
Also, the variation of delay times from channel to channel is
less than 0.25 ns.
Microprocessor Interface
On-chip data latches in the DG535/536 simplify interface with
a microprocessor data bus. This eliminates the need for
peripheral memory devices (such as I/O ports or D-type latch
ICs) to maintain switch addressing while the processor uses its
data bus for other functions.
The data latches are activated by the DG535/536 strobe input
(ST). The latch is transparent when ST= logic 1, thus the
device responds to changes of data at the address inputs.
When ST = logic 0, the previous data is latched into the device,
regardless of new data appearing at the address inputs.
The DG535/536 timing arrangements meet the requirements
of popular microprocessors, such as the 8085A, 6800, and
Z80. The 8085A to DG535/536 interface is shown in
Figure 20, and Table 3 illustrates the timing compatibility of the
DG535/536 with the 8085A and the faster 8085A-2 devices.
TABLE 3.
Timing—DG538/536 With Popular Microprocessors
Specification
tSW (strobe pulse width)
tDW (data valid to strobe)
tWD (data valid after strobe)
8085A
ns/min.
400
420
100
8085A-2
ns/min.
230
230
60
DG536
ns/min.
200
100
50
5 V +15 V
+15 V
8085A
mP
System
Bus
Data Bus
WR
Address Bus
CS
Address
Decoder
MC14504
A0 V+ CS
A1
A2
A3
EN
ST
DG535/536
D
GNDs CS
S1
S16
D
FIGURE 20. 8085A to DG535/536 Interface
6800 mP
System
Bus
R1
R2
R3
R4
R5
Data Bus
CD7407
F2 = DBE
Control Bus
R/W
+15 V
R6
A0 V+ CS
A1
A2
A3
EN
DG535/536
ST
D
GNDs CS
+15 V
S1
S16
D
Address Bus
CS
Address
Decoder
www.vishay.com S FaxBack 408-970-5600
6-10
R1 to R6 = 100 kW
FIGURE 21. 6800 to DG535/536 Interface
Document Number: 70608
03-Aug-99

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