AN209 Ver la hoja de datos (PDF) - Unspecified

Número de pieza

componentes Descripción

Fabricante

AN209

Using Terminator Technology in Stratix & Stratix GX Devices

Unspecified 

AN 209: Using Terminator Technology in Stratix & Stratix GX Devices

Figure 3. Terminator Technology Parallel Termination

Driver with Parallel

Termination

VTT

R T1

Z0

Receiver with Terminator

Technology Parallel Termination

VTT

R T2

VREF

Table 2 shows the supported I/O standards for parallel termination in

Stratix and Stratix GX devices.

Table 2. Supported I/O Standards for Parallel Termination

Supported I/O

Standards

SSTL-3 class I

SSTL-3 class II (1)

SSTL-2 class I

SSTL-2 class II (1)

HSTL class I

HSTL class II

GTL

GTL+

CTT

Parallel

Termination

(RT1)

N/A

50 Ω

N/A

50 Ω

N/A

50 Ω

50 Ω

50 Ω

N/A

Parallel

Termination

(RT2)

50 Ω

50 Ω

50 Ω

50 Ω

50 Ω

50 Ω

50 Ω

50 Ω

50 Ω

VCCIO (V)

3.3

3.3

2.5

2.5

1.5

1.5

3.3

3.3

3.3

Note to Table 2:

(1) In addition to parallel termination, SSTL-3 and SSTL-2 class II I/O standards

require a series termination next to the output buffer. If you are using these I/O

standards for the output pins, Altera recommends using the on-chip series

termination and an external pull-up resistor to VTT for parallel termination.

Figure 4 shows the connection scheme for these particular I/O standards.

4

Altera Corporation

Share Link: