DS2890P-000 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2890P-000

1-Wire® Digital Potentiometer

Dallas Semiconductor -> Maxim Integrated 

DS2890

OPERATION

The DS2890 is a single element digital potentiometer; a block diagram of the device is shown in Figure 1.

The device has a total of 256 linearly spaced tap points including the RL and RH terminals; a total of 255

resistive segments exist between the RL and RH terminals. These tap points are accessible to the WIPER

terminal whose position is controlled via the 1-Wire bus interface. Wiper position and device state are

maintained as long as the 1-Wire bus is active or the VDD supply is applied within operating limits.

Otherwise, a power-on reset will occur and the wiper position and operating state will return to power-on

default conditions.

Figure 1. DS2890 BLOCK DIAGRAM

As shown in the figure the device has five major elements: the 1-Wire Function Controller, the

Potentiometer Controller, the 64-bit ROM, the resistor array, and Parasite Power circuitry. Each of these

elements is discussed in detail throughout the remainder of the data sheet. DS2890 control including

device selection, positioning/reading the potentiometer wiper, and device operating state is performed

over the 1-Wire bus. The hierarchical structure of the 1-Wire protocol as applicable to the DS2890 is

shown in Figure 2. As shown, the control sequence starts with the 1-Wire bus master issuing one of eight

ROM function commands. After a ROM function command is successfully completed potentiometer

functions may be executed. The protocol for ROM and potentiometer functions are described in the

“COMMAND FLOW” section. For the 3-pin TO-92 package configuration and operation see the

“TO-92 PACKAGE OPERATION” section.

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