MS82V16520-8 Ver la hoja de datos (PDF) - Oki Electric Industry

Número de pieza

componentes Descripción

Fabricante

MS82V16520-8

262,144-Word x 32-Bit x 2-Bank Synchronous Graphics RAM

Oki Electric Industry 

¡ Semiconductor

MS82V16520

Masked Block Write with Auto Precharge Command (CS, CAS, WE = "Low", RAS, DSF,

A9 = "High")

The Masked Block Write with Auto Precharge command performs precharging at the bank

selected by BA automatically after Masked Block Write.

Read Command (CS, CAS, DSF, A9 = "Low", RAS, WE = "High")

The Read command is required to begin burst read operation. Then burst access initial bit

column address is strobed.

Read with Auto Prechaege Command (CS, CAS, DSF = "Low", RAS, WE, A9 = "High")

The Read with Auto Precharge command is required to begin burst read operation with auto

precharge after the burst read. Any command that interrupts this operation cannot be issued.

No Operation Command (CS = "Low", RAS, CAS, WE = "High")

The No Operation command does not trigger any operation.

Device Deselect Command (CS = "High")

The Device Deselect command disables the RAS, CAS, WE, DSF and Address input. This

command does not trigger any operation.

Data Write/Output Enable Command (DQMi = "Low")

The Data Write/Output Enable command enables DQ0 - DQ31 in read or write.

The each DQM0, 1, 2 and 3 corresponds to DQ0 - DQ7, DQ8 - DQ15, DQ16 - DQ23 and DQ24

- DQ31 respectively.

Data Mask/Output Disable Command (DQMi = "High")

The Data Mask/Output Disable command disables DQ0 - DQ31. In read cycle output buffers

are disabled after 2 clocks . In write cycle input buffers are disabled at the same clock. The each

DQM0, 1, 2 and 3 corresponds to DQ0 - DQ7, DQ8 - DQ15, DQ16 - DQ23 and DQ24 - DQ31

respectively.

Burst Stop Command (CS, WE, DSF = "Low", RAS, CAS = "High")

The Burst Stop command stops burst access when the access is in full page. After the Burst Stop

command is entered, the output buffer goes into high impedance state.

8/66

Share Link: