WS128K32-25G2SMF Ver la hoja de datos (PDF) - Unspecified
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WS128K32-25G2SMF Datasheet PDF : 6 Pages
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WS128K32-25G2SMX
128Kx32 Radiation Hardened SRAM MODULE ADVANCED*
FEATURES
s Access Time of 25ns
s Radiation Tolerant
• Total Dose Hardness through 1x106 rad (SiO2)
s Neutron Hardness through 1x1014 cm-2
s Dynamic and Static Transient Upset Hardness through
1x1011 rad (Si)/s
s Dose Rate Survivability through < 1x1012 rad (Si)/s
s Soft Error Rate of < 1x10-10 upsets/bit-day in Geosynchro-
nous Orbit
s No Latchup
s Packaging:
s Organized as 128Kx32; User Configurable as 256Kx16 or
512Kx8
s Military Temperature Range
s 5 Volt Power Supply
s Low Power CMOS
s TTL Compatible Inputs and Outputs
s Built in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation
* This data sheet describes a product that may or may not be under
development and is subject to change or cancellation without notice.
• 68 lead, Hermetic CQFP (G2S), 7.62mm (0.300") height
(Package 515). Designed to fit JEDEC 68 lead 0.990” CQFJ
footprint.
4
FIG.1 PIN CONFIGURATION FOR WS128K32-25G2SMX
TOP VIEW
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
10
60
11
59
12
58
13
57
14
56
15
55
16
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-16
Address Inputs
WE1-4
Write Enables
CS1-4
Chip Selects
OE
Output Enable
0.940"
VCC
Power Supply
GND
Ground
The White 68 lead G2S CQFP
fills the same fit and function as
NC
Not Connected
the JEDEC 68 lead CQFJ or 68
PLCC. But the G2S has the TCE
and lead inspection advantage
of the CQFP form.
BLOCK DIAGRAM
OE
A0-16
W E1C S 1
W E2 C S2
W E3 C S 3
W E 4C S4
128K x 8
128K x 8
128K x 8
128K x 8
8
I/O0-7
8
I/O8-15
8
I/O16-23
8
I/O24-31
July 1998
1
White Microelectronics • Phoenix, AZ • (602) 437-1520
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