LH1694 Ver la hoja de datos (PDF) - Sharp Electronics

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LH1694

256-output TFT-LCD Gate Driver IC

Sharp Electronics 

Functional Operations

LH1694 can select the LCD drive output level (OG1

to OG256) by the set of the input signal (CKV,

SVIO, SVOI, OE1, OE2, OE3).

When the pin for selecting the bi-directional shift

register (R/L) is set to "H", LCD drive outputs shift

from OG1 to OG256, and when set to "L", LCD

drive outputs shift from OG256 to OG1.

OE1,OE2 and OE3 are signals for output-enable.

Output pins output non-selecting data (VEE level)

when OE1 to OE3 pins are set to "H" and it has no

relation with input clock.

While R/L = "H" input data from SVIO is read at the

rising edge of shift clock (CKV), and outputs to

LCD drive output pin OG1 at the width for one

Example of Input/Output Timing (R/L = "H")

CKV

SVIO

(Input)

OE1

1

2

3

4

5

OE2

OE3

OG1

OG2

OG3

OG4

OG5

OG6

•••••

OG256

SVIO

(Output)

LH1694

cycle of shift clock. Next LCD drive output pins from

OG2 to OG256 are sequentially shifted at the rising

edge of the CKV for one cycle. Shift signal of

OG256 is read at the falling edge of the clock

signal, and the input data for the next cascade is

output from the SVOI pin.

While R/L = "L" input data from SVOI is read at the

rising edge of shift clock (CKV), and outputs to LCD

drive output pin OG256 at the width for one cycle of

shift clock. Next LCD drive output pins from OG255 to

OG1 are sequentially shifted at the rising edge of the

CKV for one cycle. Shift signal of OG1 is read at the

falling edge of the clock signal and the input data for

the next cascade is output from the SVIO pin.

6

7

255 256 257 258

5

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