ADV7344 Ver la hoja de datos (PDF) - Analog Devices
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ADV7344 Datasheet PDF : 108 Pages
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ADV7344
Data Sheet
DIGITAL TIMING SPECIFICATIONS—1.8 V
VDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, VAA = 2.6 V to 3.465 V, VDD_IO = 1.71 V to 1.89 V.
All specifications TMIN to TMAX (−40°C to +85°C), unless otherwise noted.
Table 9.
Parameter
VIDEO DATA AND VIDEO CONTROL PORT2, 3
Data Input Setup Time, t114
Data Input Hold Time, t124
Control Input Setup Time, t114
Control Input Hold Time, t124
Control Output Access Time, t134
Control Output Hold Time, t144
PIPELINE DELAY5
SD1
CVBS/YC Outputs (2×)
CVBS/YC Outputs (16×)
Component Outputs (2×)
Component Outputs (16×)
ED1
Component Outputs (1×)
Component Outputs (8×)
HD1
Component Outputs (1×)
Component Outputs (4×)
Conditions1
Min Typ Max
SD
1.4
ED/HD-SDR
1.9
ED/HD-DDR
1.9
ED (at 54 MHz)
1.6
SD
1.4
ED/HD-SDR
1.5
ED/HD-DDR
1.5
ED (at 54 MHz)
1.3
SD
1.4
ED/HD-SDR or ED/HD-DDR
1.2
ED (at 54 MHz)
1.0
SD
1.4
ED/HD-SDR or ED/HD-DDR
1.0
ED (at 54 MHz)
1.0
SD
13
ED/HD-SDR, ED/HD-DDR or ED (at 54 MHz)
12
SD
4.0
ED/HD-SDR, ED/HD-DDR or ED (at 54 MHz) 5.0
SD oversampling disabled
68
SD oversampling enabled
67
SD oversampling disabled
78
SD oversampling enabled
84
ED oversampling disabled
41
ED oversampling enabled
46
HD oversampling disabled
40
HD oversampling enabled
44
1 SD = standard definition, ED = enhanced definition (525p/625p), HD = high definition, SDR = single data rate, DDR = dual data rate.
2 Video data: C[9:0], Y[9:0], and S[9:0].
3 Video control: P_HSYNC, P_VSYNC, P_BLANK, S_HSYNC, and S_VSYNC.
4 Guaranteed by characterization.
5 Guaranteed by design.
Unit
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Clock cycles
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Rev. B | Page 10 of 108
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