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ADSP-BF535

Blackfin® Embedded Processor

Analog Devices 

ADSP-BF535

TABLE OF CONTENTS

GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . 2

Portable Low Power Architecture . . . . . . . . . . . . . . . 2

System Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

ADSP-BF535 Peripherals . . . . . . . . . . . . . . . . . . . . . 3

Processor Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Memory Architecture . . . . . . . . . . . . . . . . . . . . . . . . 4

Internal (On-Chip) Memory . . . . . . . . . . . . . . . . . . 5

External (Off-Chip) Memory . . . . . . . . . . . . . . . . . 5

PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

I/O Memory Space . . . . . . . . . . . . . . . . . . . . . . . . . 5

Booting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Event Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Core Event Controller (CEC) . . . . . . . . . . . . . . . . 6

System Interrupt Controller (SIC) . . . . . . . . . . . . . 6

Event Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

DMA Controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

External Memory Control . . . . . . . . . . . . . . . . . . . . . 8

PC133 SDRAM Controller . . . . . . . . . . . . . . . . . . 8

Asynchronous Controller . . . . . . . . . . . . . . . . . . . . 8

PCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

PCI Host Function . . . . . . . . . . . . . . . . . . . . . . . . . 8

PCI Target Function . . . . . . . . . . . . . . . . . . . . . . . 8

USB Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Real-Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Serial Ports (Sports) . . . . . . . . . . . . . . . . . . . . . . . . . 9

Serial Peripheral Interface (SPI) Ports . . . . . . . . . . . 10

UART Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Programmable Flags (PFX) . . . . . . . . . . . . . . . . . . . 11

Dynamic Power Management . . . . . . . . . . . . . . . . . 11

Full On Operating Mode

– Maximum Performance . . . . . . . . . . . . . . . . . 11

Active Operating Mode

– Moderate Power Savings . . . . . . . . . . . . . . . . 11

Sleep Operating Mode

– High Power Savings . . . . . . . . . . . . . . . . . . . . 11

Deep Sleep Operating Mode

– Maximum Power Savings . . . . . . . . . . . . . . . . 12

Mode Transitions . . . . . . . . . . . . . . . . . . . . . . . . . 12

Power Savings . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Peripheral Power Control . . . . . . . . . . . . . . . . . . . 13

Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Booting Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Instruction Set Description . . . . . . . . . . . . . . . . . . . 14

Development Tools . . . . . . . . . . . . . . . . . . . . . . . . . 15

EZ-KITLite™ forADSP-BF535 Blackfin Processor 16

Designing an Emulator Compatible

Processor Board (Target) . . . . . . . . . . . . . . . . . 16

Additional Information . . . . . . . . . . . . . . . . . . . . . . 16

PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . 17

Unused Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . 21

ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . 22

ESD SENSITIVITY . . . . . . . . . . . . . . . . . . . . . . . . 22

TIMING SPECIFICATIONS . . . . . . . . . . . . . . . . 23

Clock and Reset Timing . . . . . . . . . . . . . . . . . . . . 24

Programmable Flags Cycle Timing . . . . . . . . . . . 25

Timer PWM_OUT Cycle Timing . . . . . . . . . . . . 26

Asynchronous Memory Write Cycle Timing . . . . 27

Asynchronous Memory Read Cycle Timing . . . . . 28

SDRAM Interface Timing . . . . . . . . . . . . . . . . . . 29

Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Serial Peripheral Interface (SPI) Port

—Master Timing . . . . . . . . . . . . . . . . . . . . . . . 32

Serial Peripheral Interface (SPI) Port

—Slave Timing . . . . . . . . . . . . . . . . . . . . . . . . . 33

Universal Asynchronous Receiver-Transmitter

(UART) Port—Receive and Transmit Timing . 34

JTAG Test and Emulation Port Timing . . . . . . . . 35

Output Drive Currents . . . . . . . . . . . . . . . . . . . . 36

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . 36

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Output Enable Time . . . . . . . . . . . . . . . . . . . . 37

Output Disable Time . . . . . . . . . . . . . . . . . . . . 37

Example System Hold Time Calculation . . . . . 37

Environmental Conditions . . . . . . . . . . . . . . . . . . 38

260-Ball PBGA Pinout . . . . . . . . . . . . . . . . . . . . . . 39

OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . 44

ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . 44

GENERAL DESCRIPTION

The ADSP-BF535 processor is a member of the Blackfin

processor family of products, incorporating the Micro Signal

Architecture (MSA), jointly developed by Analog Devices, Inc.

and Intel Corporation. The architecture combines a dual MAC

state-of-the-art signal processing engine, the advantages of a

clean, orthogonal RISC-like microprocessor instruction set, and

Single-Instruction, Multiple Data (SIMD) multimedia capabili-

ties into a single instruction set architecture.

By integrating a rich set of industry leading system peripherals

and memory, Blackfin processors are the platform of choice for

next generation applications that require RISC-like programma-

bility, multimedia support, and leading edge signal processing in

one integrated package.

Portable Low Power Architecture

Blackfin processors provide world class power management and

performance. Blackfin processors are designed in a low power

and low voltage design methodology and feature dynamic power

management, the ability to independently vary both the voltage

and frequency of operation to significantly lower overall power

consumption. Varying the voltage and frequency can result in a

substantial reduction in power consumption, by comparison to

just varying the frequency of operation. This translates into

longer battery life for portable appliances.

System Integration

The ADSP-BF535 Blackfin processor is a highly integrated

system-on-a-chip solution for the next generation of digital com-

munication and portable Internet appliances. By combining

industry-standard interfaces with a high performance signal

processing core, users can develop cost-effective solutions

quickly without the need for costly external components. The

ADSP-BF535 Blackfin processor system peripherals include

UARTs, SPIs, SPORTs, general-purpose Timers, a Real-Time

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REV. A

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