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ADSP-21161N Ver la hoja de datos (PDF) - Analog Devices

Número de pieza
componentes Descripción
Fabricante
ADSP-21161N
ADI
Analog Devices ADI
ADSP-21161N Datasheet PDF : 60 Pages
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ADSP-21161N
ELECTRICAL CHARACTERISTICS
Parameter Description
Test Conditions
Min
Max
Unit
VOH
VOL
IIH
IIL
IIHC
IILC
IIKH
IIKL
IIKH-OD
IIKL-OD
IILPU
IOZH
IOZL
IOZLPU1
IOZLPU2
IOZHPD1
IOZHPD2
IDD-INPEAK
IDD-INHIGH
IDD-INLOW
IDD-IDLE
AIDD
CIN
High Level Output Voltage1
Low Level Output Voltage1
High Level Input Current3, 4
Low Level Input Current3
CLKIN High Level Input Current5
CLKIN Low Level Input Current5
Keeper High Load Current6
Keeper Low Load Current6
Keeper High Overdrive Current6, 7, 8
Keeper Low Overdrive Current6, 7, 8
Low Level Input Current Pull-Up4
Three-State Leakage Current9, 10, 11
Three-State Leakage Current9, 12, 13
Three-State Leakage Current Pull-Up110
Three-State Leakage Current Pull-Up211
Three-State Leakage Current Pull-Down112
Three-State Leakage Current Pull-Down213
Supply Current (Internal)14, 15
Supply Current (Internal)15, 16
Supply Current (Internal)15, 17
Supply Current (Idle)15, 18
Supply Current (Analog)19
Input Capacitance20, 21
@ VDDEXT = Min, IOH = –2.0 mA2
@ VDDEXT = Min, IOL = 4.0 mA2
@ VDDEXT = Max, VIN = VDDEXT Max
@ VDDEXT = Max, VIN = 0 V
@ VDDEXT = Max, VIN = VDDEXT Max
@ VDDEXT = Max, VIN = 0 V
@ VDDEXT = Max, VIN = 2.0 V
@ VDDEXT = Max, VIN = 0.8 V
@ VDDEXT = Max
@ VDDEXT = Max
@ VDDEXT = Max, VIN = 0 V
@ VDDEXT = Max, VIN = VDDEXT Max
@ VDDEXT = Max, VIN = 0 V
@ VDDEXT = Max, VIN = 0 V
@ VDDEXT = Max, VIN = 0 V
@ VDDEXT = Max, VIN = VDDEXT Max
@ VDDEXT = Max, VIN = VDDEXT Max
tCCLK = 9.0 ns, VDDINT = Max
tCCLK = 10.0 ns, VDDINT = Max
tCCLK = 9.0 ns, VDDINT = Max
tCCLK = 10.0 ns, VDDINT = Max
tCCLK = 9.0 ns, VDDINT = Max
tCCLK = 10.0 ns, VDDINT = Max
tCCLK = 9.0 ns, VDDINT = Max
tCCLK = 10.0 ns, VDDINT = Max
@ AVDD = Max
fIN = 1 MHz, TCASE = 25°C, VIN = 1.8 V
2.4
V
0.4
V
10
μA
10
μA
35
μA
35
μA
–250 –100 μA
50
200
μA
–300
μA
300
μA
350
μA
10
μA
10
μA
500
μA
350
μA
350
μA
500
μA
965
mA
900
700
mA
650
535
mA
500
425
mA
400
10
mA
4.7
pF
1 Applies to output and bidirectional pins: DATA47–16, ADDR23–0, MS3–0, RD, WR, ACK, DQM, FLAG11–0, HBG, REDY, DMAG1, DMAG2,
BR6–1, BMSTR, PA, BRST, FSx, DxA, DxB, SCLKx, RAS, CAS, SDWE, SDA10, LxDAT7–0, LxCLK, LxACK, SPICLK, MOSI, MISO, BMS, SDCLKx, SDCKE, EMU, XTAL,
TDO, CLKOUT, TIMEXP, RSTOUT.
2 See Output Drive Currents on Page 54 for typical drive current capabilities.
3 Applies to input pins: DATA47–16, ADDR23–0, MS3–0, SBTS, IRQ2–0, FLAG11–0, HBG, HBR, CS, BR6–1, ID2–0, RPBA, BRST, FSx, DxA, DxB, SCLKx, RAS, CAS, SDWE,
SDCLK0, LxDAT7–0, LxCLK, LxACK, SPICLK, MOSI, MISO, SPIDS, EBOOT, LBOOT, BMS, SDCKE, CLK_CFGx, CLKDBL, TCK, RESET, CLKIN.
4 Applies to input pins with 20 kinternal pull-ups: RD, WR, ACK, DMAR1, DMAR2, PA, TRST, TMS, TDI.
5 Applies to CLKIN only.
6 Applies to all pins with keeper latches: ADDR23–0, DATA47–0, MS3–0, BRST, CLKOUT.
7 Current required to switch from kept high to low or from kept low to high.
8 Characterized, but not tested.
9 Applies to three-statable pins: DATA47–16, ADDR23–0, MS3–0, CLKOUT, FLAG11–0, REDY, HBG, BMS, BR6–1, RAS, CAS, SDWE, DQM, SDCLKx, SDCKE, SDA10,
BRST.
10Applies to three-statable pins with 20 kpull-ups: RD, WR, DMAG1, DMAG2, PA.
11Applies to three-statable pins with 50 kinternal pull-ups: DxA, DxB, SCLKx, SPICLK., EMU, MISO, MOSI.
12Applies to three-statable pins with 50 kinternal pull-downs: LxDAT7–0 (below Revision1.2), LxCLK, LxACK. Use IOZHPD2 for Rev. 1.2 and higher.
13Applies to three-statable pins with 20 kinternal pull-downs: LxDAT7-0 (Revision 1.2 and higher).
14The test program used to measure IDDINPEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal power
measurements made using typical applications are less than specified. For more information, see Power Dissipation on Page 20.
15Current numbers are for VDDINT and AVDD supplies combined.
16IDDINHIGH is a composite average based on a range of high activity code. For more information, see Power Dissipation on Page 20.
17IDDINLOW is a composite average based on a range of low activity code. For more information, see Power Dissipation on Page 20.
18Idle denotes ADSP-21161N state during execution of IDLE instruction. For more information, see Power Dissipation on Page 20.
19Characterized, but not tested.
20Applies to all signal pins.
21Guaranteed, but not tested.
Rev. C | Page 18 of 60 | January 2013

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