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ADNS-5030 Ver la hoja de datos (PDF) - Avago Technologies

Número de pieza
componentes Descripción
Fabricante
ADNS-5030
AVAGO
Avago Technologies AVAGO
ADNS-5030 Datasheet PDF : 24 Pages
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Power Management Modes
The ADNS-5030 has three power-saving modes. Each
mode has a different motion detection period, affecting
response time to mouse motion (Response Time). The
sensor automatically changes to the appropriate mode,
depending on the time since the last reported motion
(Downshift Time). The parameters of each mode are
shown in the following table.
Mode
Rest 1
Rest 2
Rest 3
Response Time
(Typical)
14 ms
68 ms
340 ms
Downshift Time
(Typical)
<1s
7s
410 s
LED Mode
For power savings, the LED will not be continuously on.
ADNS-5030 will pulse the LED only when needed.
Synchronous Serial Port
The synchronous serial port is used to set and read pa-
rameters in the ADNS-5030, and to read out the motion
information.
The port is a four wire serial port. The host micro-control-
ler always initiates communication; the ADNS-5030 never
initiates data transfers. SCLK, MOSI, and NCS may be
driven directly by a micro-controller. The port pins may be
shared with other SPI slave devices. When the NCS pin is
high, the inputs are ignored and the output is tri-stated.
The lines that comprise the SPI port:
SCLK: Clock input. It is always generated by the master
(the micro-controller).
MOSI: Input data. (Master Out/Slave In)
MISO: Output data. (Master In/Slave Out)
NCS: Chip select input (active low). NCS needs to be low
to activate the serial port; otherwise, MISO will be
high Z, and MOSI & SCLK will be ignored. NCS can
also be used to reset the serial port in case of an
error.
Chip Select Operation
The serial port is activated after NCS goes low. If NCS
is raised during a transaction, the entire transaction is
aborted and the serial port will be reset. This is true for all
transactions. After a transaction is aborted, the normal
address-to-data or transaction-to-transaction delay is
still required before beginning the next transaction. To
improve communication reliability, all serial transac-
tions should be framed by NCS. In other words, the port
should not remain enabled during periods of non-use
because ESD and EFT/B events could be interpreted as
serial communication and put the chip into an unknown
state. In addition, NCS must be raised after each burst-
mode transaction is complete to terminate burst-mode.
The port is not available for further use until burst-mode
is terminated.
Write Operation
Write operation, defined as data going from the micro-
controller to the ADNS-5030, is always initiated by the
micro-controller and consists of two bytes. The first byte
contains the address (seven bits) and has a “1” as its MSB
to indicate data direction. The second byte contains
the data. The ADNS-5030 reads MOSI on rising edges of
SCLK.
NCS
SCLK
MOSI
MISO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
Write Operation
MOSI DRIVEN BY MICRO-CONTROLLER
1
2
1
A6
11

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