ADF7021-V Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Fabricante

ADF7021-V

High Performance, Narrow-Band Transceiver IC

Analog Devices 

ADF7021-V

UART/SPI Mode

UART mode is enabled by setting Register 0, Bit DB28 to 1. SPI mode is enabled by setting Register 0, Bit DB28 to 1 and setting Register 15,

Bits[DB19:DB17] to 0x7. The transmit/receive data clock is available on the CLKOUT pin.

tBIT

CLKOUT

(TRANSMIT/RECEIVE DATA

CLOCK IN SPI MODE.

NOT USED IN UART MODE.)

TxRxCLK

(TRANSMIT DATA INPUT

IN UART/SPI MODE.)

FETCH SAMPLE

Tx BIT

Tx BIT

Tx BIT

Tx BIT

Tx BIT

TxRxDATA

(RECEIVE DATA OUTPUT

IN UART/SPI MODE.)

HIGH-Z

Tx/Rx MODE

CLKOUT

(TRANSMIT/RECEIVE DATA

CLOCK IN SPI MODE.

NOT USED IN UART MODE.)

TxRxCLK

(TRANSMIT DATA INPUT

IN UART/SPI MODE.)

TxRxDATA

(RECEIVE DATA OUTPUT

IN UART/SPI MODE.)

Tx/Rx MODE

Tx MODE

Figure 8. Transmit Timing Diagram in UART/SPI Mode

tBIT

FETCH SAMPLE

HIGH-Z

Rx BIT

Rx BIT

Rx BIT

Rx BIT

Rx MODE

Figure 9. Receive Timing Diagram in UART/SPI Mode

Rx BIT

Rev. 0 | Page 13 of 60

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