ADA4062-2ARZ-R7 Ver la hoja de datos (PDF) - Analog Devices
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ADA4062-2ARZ-R7 Datasheet PDF : 20 Pages
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FEATURES
Low input bias current: 50 pA maximum
Offset voltage
1.5 mV maximum for B grade (ADA4062-2 SOIC package)
2.5 mV maximum for A grade
Offset voltage drift: 5 μV/°C typical
Slew rate: 3.3 V/μs typical
CMRR: 90 dB typical
Low supply current: 165 μA typical
High input impedance
Unity-gain stable
±5 V to ±15 V dual-supply operation
Packaging
8-lead SOIC, 8-lead MSOP, 10-lead LFCSP, 14-lead TSSOP, and
16-lead LFCSP packages
APPLICATIONS
Power controls and monitoring
Active filters
Industrial/process controls
Body probe electronics
Data acquisition
Integrators
Input buffering
GENERAL DESCRIPTION
The ADA4062-2 and ADA4062-4 are dual and quad JFET-input
amplifiers with industry-leading performance. They offer lower
power, offset voltage, drift, and ultralow bias current. The
ADA4062-2 B grade (SOIC package) features a typical low offset
voltage of 0.5 mV, an offset drift of 5 μV/°C, and a bias current
of 2 pA.
The ADA4062 family is ideal for various applications, including
process controls, industrial and instrumentation equipment,
active filtering, data conversion, buffering, and power control
and monitoring. With a low supply current of 165 μA per
amplifier, they are well suited for lower power applications.
The ADA4062 family is also specified for the extended industrial
temperature range of −40°C to +125°C. The ADA4062-2 is
available in lead-free, 8-lead SOIC, 8-lead MSOP, and 10-lead
LFCSP (1.6 mm × 1.3 mm × 0.55 mm) packages, while the
ADA4062-4 is available in lead-free, 14-lead TSSOP and
16-lead LFCSP packages.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Low Power JFET-Input Op Amps
ADA4062-2/ADA4062-4
PIN CONFIGURATIONS
OUT A 1
8 V+
–IN A 2 ADA4062-2 7 OUT B
+IN A 3
TOP VIEW
(Not to Scale)
6 –IN B
V– 4
5 +IN B
Figure 1. 8-Lead Narrow-Body SOIC and 8-Lead MSOP
–IN A 2
+IN A 3
ADA4062-2
TOP VIEW
(Not to Scale)
8 OUT B
7 –IN B
NC = NO CONNECT
Figure 2. 10-Lead LFCSP
OUT A 1
–IN A 2
+IN A 3
V+ 4
+IN B 5
–IN B 6
OUT B 7
14 OUT D
13 –IN D
ADA4062-4
TOP VIEW
(Not to Scale)
12 +IN D
11 V–
10 +IN C
9 –IN C
8 OUT C
Figure 3. 14-Lead TSSOP
–IN A 1
+IN A 2
V+ 3
+IN B 4
ADA4062-4
TOP VIEW
(Not to Scale)
12 –IN D
11 +IN D
10 V–
9 +IN C
NOTES
1. NC = NO CONNECT.
2. IT IS RECOMMENDED TO CONNECT THE EXPOSED PAD TO V–.
Figure 4. 16-Lead LFCSP
Table 1. Low Power Op Amps
Precision
CMOS
Precision
High Bandwidth
Single AD8663
AD8641
Dual
AD8667
AD8642
Quad AD8669
AD8643
High
Bandwidth
AD8682
AD8684
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