AD9958 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD9958 Datasheet PDF : 44 Pages
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Parameter
Min
Typ
Max
POWER SUPPLY
Total Power Dissipation—Both Channels On, Single-
Tone Mode
315
380
Total Power Dissipation—Both Channels On, with
Sweep Accumulator
350
420
Total Power Dissipation—Full Power-Down
13
IAVDD—Both Channels On, Single-Tone Mode
90
105
IAVDD—Both Channels On, Sweep Accumulator,
REFCLK Multiplier, and 10-Bit Output Scalar
Enabled
95
110
IDVDD—Both Channels On, Single-Tone Mode
60
70
IDVDD—Both Channels On, Sweep Accumulator,
REFCLK Multiplier, and 10-Bit Output Scalar
Enabled
70
80
IDVDD_I/O
22
30
IAVDD Power-Down Mode
2.5
IDVDD Power-Down Mode
2.5
DATA LATENCY (PIPELINE DELAY) SINGLE-TONE MODE2, 3
Frequency, Phase, and Amplitude Words to DAC
29
Output with Matched Latency Enabled
Frequency Word to DAC Output with Matched
29
Latency Disabled
Phase Offset Word to DAC Output with Matched
25
Latency Disabled
Amplitude Word to DAC Output with Matched
17
Latency Disabled
DATA LATENCY (PIPELINE DELAY) MODULATION MODE3, 4
Frequency Word to DAC Output
34
Phase Offset Word to DAC Output
29
Amplitude Word to DAC Output
21
DATA LATENCY (PIPELINE DELAY) LINEAR SWEEP MODE3, 4
Frequency Rising/Falling Delta-Tuning Word to DAC 41
Output
Phase Offset Rising/Falling Delta-Tuning Word to
37
DAC Output
Amplitude Rising/Falling Delta-Tuning Word to DAC 29
Output
1 For the VCO frequency range of 160 MHz to 255 MHz, there is no guarantee of operation.
2 Data latency is referenced to I/O_UPDATE.
3 Data latency is fixed.
4 Data latency is referenced to a profile change.
AD9958
Unit
Test Conditions/Comments
mW
Dominated by supply variation
mW
Dominated by supply variation
mW
mA
mA
mA
mA
mA
IDVDD = read
mA
IDVDD = write
mA
mA
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
SYSCLKs
Rev. A | Page 7 of 44
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