DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

AD9876 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza
componentes Descripción
Fabricante
AD9876 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9876–SPECIFICATIONS (VS = 3.3 V ؎10%, fOSCIN = 32 MHz, fDAC = 128 MHz, Gain = –6 dB, RSET = 4.02 k,
100 DAC single-ended load, unless otherwise noted. )
Parameter
Test
Temp Level
Min
OSCIN CHARACTERISTICS
Frequency Range
Duty Cycle
Input Capacitance
Input Impedance
Full
II
10
Full
II
40
25°C
III
25°C
III
CLOCK OUTPUT CHARACTERISTICS
CLK A Jitter (fCLKA Derived from PLL)
CLK A Duty Cycle
CLK B Jitter (fCLKB Derived from PLL)
CLK B Duty Cycle
25°C
III
25°C
III
25°C
III
25°C
III
Tx CHARACTERISTICS
Tx Path Latency, 4× Interpolation
Full
II
Interpolation Filter Bandwidth (–0.1 dB)
4× Interpolation, LPF
Full
II
2× Interpolation, LPF
Full
II
TxDAC
Resolution
Full
II
Conversion Rate
Full
II
10
Full-Scale Output Current
Full
II
2
Voltage Compliance Range
Full
II
–0.5
Gain Error
Full
II
–5
Output Offset (Single-Ended)
Full
II
0
Differential Nonlinearity
Full
III
Integral Nonlinearity
25°C
III
Output Capacitance
25°C
III
Phase Noise @ 1 kHz Offset, 10 MHz Signal 25°C
III
Signal-to-Noise and Distortion (SINAD)
10 MHz Analog Out AD9876 (20 MHz BW) Full
I
62.5
Wideband SFDR (to Nyquist, 64 MHz Max) 25°C
III
5 MHz Analog Out
25°C
III
10 MHz Analog Out
25°C
III
Narrow-Band SFDR (3 MHz Window):
10 MHz Analog Out
25°C
III
IMD (f1 = 6.9 MHz, f2 = 7.1 MHz)
25°C
III
Rx PATH CHARACTERISTICS
Resolution
NA
NA
Conversion Rate
Full
II
7.5
Pipeline Delay, ADC Clock Cycles
NA
NA
DC Accuracy
Differential Nonlinearity
Full
II
–1.0
Integral Nonlinearity
Full
II
–4.5
Dynamic Performance (ADC Clocked Direct)
(AIN = –0.5 dBFS, f = 5 MHz)
@ fOSCIN = 32 MHz
Signal-to-Noise and Distortion Ratio (SINAD) Full
I
60.8
Effective Number of Bits (ENOB)
Full
I
9.8
Signal-to-Noise Ratio (SNR)
25°C
III
Total Harmonic Distortion (THD)
25°C
III
Spurious-Free Dynamic Range (SFDR)
25°C
III
Dynamic Performance (ADC Clocked, PLLB/2)
(AIN = –0.5 dBFS, f = 5 MHz)
@ FPLLB/2 = 50 MHz
Signal-to-Noise and Distortion Ratio (SINAD) 25°C
III
Effective Number of Bits (ENOB)
25°C
III
Signal-to-Noise Ratio (SNR)
25°C
III
Total Harmonic Distortion (THD)
25°C
III
Spurious-Free Dynamic Range (SFDR)
25°C
III
Typ
50
3
100
14
50 ± 5
33
50 ± 5
86
13
26
12
10
±2
2
±1
±2
5
–100
65
80
74
88
–80
12
5.5
± 0.25
± 0.5
Max
64
60
128
20
+1.5
+5
5
64
+1.0
+3.5
63.2
10.2
64
–70
72
56
9.3
59
–63
68
Unit
MHz
%
pF
M
ps rms
%
ps rms
%
fDAC Cycles
MHz
MHz
Bits
MHz
mA
V
% FS
µA
LSB
LSB
pF
dBc/Hz
dB
dBc
dBc
dBc
dBFS
Bits
MHz
Cycles
LSB
LSB
dB
Bits
dB
dB
dB
dB
Bits
dB
dB
dB
–2–
REV. A

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]