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EVALUATION BOARD

Fairchild Semiconductor 

SPT7820/24 CHARACTERIZATION

SELECTION OF THE SIGNAL GENERATORS

Performance at speed is the main goal in evaluating any

ADC, but it is beneficial to start from a relatively low speed and

verify key parameters. It is also beneficial to predict perfor-

mance at speed. If the transition noise and/or the differential

linearity of the device perform poorly at low frequency, the

SNR at speed cannot be expected to be better. In addition,

the low frequency setup can be useful as a verification tool for

the test set-up.

At low frequency there are numerous ways of characterizing

the differential linearity error (DLE), integral linearity error

(ILE), transition noise, missing codes (MC), synchronous

noise, nonmonotonicity, power supply sensitivity and power

supply currents. Fairchild will guide the user through two

classical yet powerful testing approaches to achieve fast and

relatively accurate results.

High frequency or dynamic testing, the missing codes test,

ILE, DLE, VOS and the gain error tests are based on

statistical results. They can be performed using the histo-

gram technique. SNR and THD are tested by using the fast

Fourier transform (FFT).

EB7820/24 was designed to provide optimum capability in

fulfilling the above characterization needs.

EQUIPMENT HOOKUP

Figure 13: Synchronous Equipment Hookup

For very high speed and high accuracy ADC testing, selection

of both analog and clock inputs is critical. Two parameters

are important in selecting the generators 1 and 2:

1) The purity of the output sinewave must be at least 76 dB

or better of SNR. An appropriate band pass filter (BPF)

installed after the generator will help improve the SNR.

2) The sampling clock jitter or aperture jitter can originate

both inside and outside the A/D converter.

Consider the selection of an acceptable clock generator. The

uncertainty of the clock placement due to the time jitter

(aperture jitter) degrades the effective performance of the

device. This jitter is translated into the ADC amplitude error

and is proportional to the analog input slew rate. For a

sinusoidal input, the uncertainty of the clock edge placement

from cycle to cycle due to the equipment jitter has an effect on

the A/D converter performance, especially the SNR:

SNR (Max) = {20 LOG [1/ ( 2π Fin Tj )] + 3.02 } dB,

Where :

Fin = analog input frequency

and

and Tj = the aperture jitter in RMS

Fairchild uses the following equipment when characterizing/

testing the SNR and THD: HP8644A synthesized signal

generator for both generators 1 and 2 and HP3325 function

generator for generator 3.

LOW FREQUENCY PERFORMANCE CHECK

REF

OUT

GENERATOR # 1

OUT

IN

BPF OUT

ANALOG IN

Figure 14 : Three-Bit Reconstruction DAC

REF

IN

GENERATOR #2

OUT

CLOCK

REF

IN

GENERATOR # 3

OUT

CCLK (if SJ4 is installed)

Coherent testing is recommended in characterizing the

SPT7820/24. All three signals (VIN, CLK and CCLK) are

synchronized. This testing gives well defined results when

using the following suggested techniques for evaluating the

performance of the device. These techniques also signifi-

cantly reduce the testing time, especially the dynamic testing.

The diagram in figure 13 suggests one way to achieve this

goal. Generator 1 is the analog input. Generator 2 is the

sampling clock, sinewave and ±3 VP-P maximum. Genera-

tor 3 (only needed if solder jumper option SJ4 is used) is the

capture clock, TTL. A phase adjustment option for genera-

tor 3 is necessary to place the edge of the capture clock at the

proper setup time. R11 and R12 are 51 Ω and serve as

termination resistors for generator 2 and generator 3, respec-

tively.

B2

B1

B0 (LSB)

R30

5.1 kΩ

R31

10 kΩ

R32

20 kΩ

R31

10 kΩ

DGND

STEP

This section describes one approach to visual evaluation of

the differential linearity error (DLE), missing codes (MC),

non-monotonicity, synchronous noise and transition noise.

The BNC DAC OUT (from the mother board, figure 18) can be

the monitoring point to view the quality of the quantization

signal, but this may pose a great deal of difficulty. Fairchild

suggests another approach commonly used in the industry.

AN7820/24

9

5/22/97

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