AD9764 Ver la hoja de datos (PDF) - Analog Devices

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Fabricante

AD9764

14-Bit, 125 MSPS TxDAC® D/A Converter

Analog Devices 

AD9764

–70

–75

2ND HARMONIC

–80

3RD HARMONIC

–85

4TH HARMONIC

–90

–95

000.0E+0 40.0E+6 80.0E+6 120.0E+6

Figure 12. THD vs. fCLOCK @

fOUT = 2 MHz

85

IOUTFS = 20mA,

80

DVDD = +3V

IOUTFS = 20mA,

DVDD = +5V

75

IOUTFS = 10mA,

DVDD = +3V

70

IOUTFS = 10mA,

DVDD = +5V

65 IOUTFS = 5mA,

DVDD = +3V

IOUTFS = 5mA,

60

DVDD = +5V

0 10 20 30 40 50 60 70 80 90 100

fCLOCK – MSPS

Figure 13. SNR vs. fCLOCK @ fOUT =

2.0 MHz

2.0

1.5

1.0

0.5

0.0

–0.5

–1.0

–1.5

–2.0

0

4000

8000 12000

CODE

Figure 15. Typical INL

16000

2.0

1.5

1.0

0.5

0.0

–0.5

–1.0

0

4000

8000 12000

CODE

16000

Figure 16. Typical DNL

0

–10

fCLK = 50MSPS

fOUT = 1.25MHz

–20

SFDR = 78dBc

AMPLITUDE = 0dBFS

–30

–40

–50

–60

–70

–80

–90

000.0E+0

7.5E+6

15.0E+6

22.5E+6

Figure 18. Single-Tone SFDR

0

–10

fCLK = 50MSPS

fOUT1 = 6.75MHz

–20

fOUT2 = 7.25MHz

SFDR = 69dBc

–30

AMPLITUDE = 0dBFS

–40

–50

–60

–70

–80

–90

0E+0 5E+6 10E+6 15E+6 20E+6 25E+6

Figure 19. Dual-Tone SFDR

80

IDIFF @ –6dBFS

70

IDIFF @ 0dBFS

60

IA @ –6dBFS

IA @ 0dBFS

50

1

10

100

OUTPUT FREQUENCY – MHz

Figure 14. Differential vs. Single-

Ended SFDR vs. fOUT @ 50 MSPS

80

75

2.5MHz

70

65

10MHz

60

55

40MHz

50

–40 –20 0 20 40 60 80

TEMPERATURE – ؇C

Figure 17. SFDR vs. Temperature

@ 100 MSPS, 0 dBFS

0

fCLK = 50MSPS

–10

fOUT1 = 6.25MHz

–20

fOUT2 = 6.75MHz

–30

fOUT3 = 7.25MHz

fOUT4 = 7.75MHz

–40

SFDR = 66dBc

AMPLITUDE = 0dBFS

–50

–60

–70

–80

–90

–100

000.0E+0

7.5E+6

15.0E+6

22.5E+6

Figure 20. Four-Tone SFDR

–8–

REV. C

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