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AD9683 Ver la hoja de datos (PDF) - Analog Devices

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Fabricante
AD9683 Datasheet PDF : 44 Pages
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Data Sheet
Parameter
SYSREF INPUTS (SYSREF+/SYSREF−)
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage Range
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
LOGIC INPUT (RST)1
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
LOGIC INPUTS (SCLK, PDWN, CS2)3
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
LOGIC INPUT (SDIO)3
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
DIGITAL OUTPUTS (SERDOUT0+/SERDOUT0−)
Logic Compliance
Differential Output Voltage (VOD)
Output Offset Voltage (VOS)
DIGITAL OUTPUTS (SDIO/FD4)
High Level Output Voltage (VOH)
IOH = 50 µA
IOH = 0.5 mA
IOH = 2.0 mA
Low Level Output Voltage (VOL)
IOL = 2.0 mA
IOL = 1.6 mA
IOL = 50 µA
1 Pull-up.
2 Needs an external pull-up.
3 Pull-down.
4 Compatible with JEDEC standard JESD8-7A.
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
0.3
AGND
0.9
−5
−10
8
1.22
0
−5
−100
1.22
0
45
−10
1.22
0
45
−10
400
0.75
Typ
LVDS
0.9
4
10
26
2
26
2
26
5
CML
600
DRVDD/2
AD9683
Max
Unit
3.6
AVDD
1.4
+5
+10
12
2.1
0.6
+5
−45
2.1
0.6
100
+10
2.1
0.6
100
+10
V
V p-p
V
V
µA
µA
pF
kΩ
V
V
µA
µA
pF
V
V
µA
µA
pF
V
V
µA
µA
pF
750
mV
1.05
V
1.79
V
1.75
V
1.6
V
0.25
V
0.2
V
0.05
V
Rev. 0 | Page 7 of 44

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