AD9683 Ver la hoja de datos (PDF) - Analog Devices

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componentes Descripción

Fabricante

AD9683

14-Bit, 170 MSPS/250 MSPS, JESD204B, Analog-to-Digital Converter

Analog Devices 

AD9683

Data Sheet

SPECIFICATIONS

ADC DC SPECIFICATIONS

AVDD = 1.8 V, DRVDD = 1.8 V, DVDD = 1.8 V, maximum sample rate for speed grade, VIN = −1.0 dBFS differential input, 1.75 V p-p

full-scale input range, duty cycle stabilizer enabled, default SPI, unless otherwise noted.

Table 1.

Parameter

Temperature Min

RESOLUTION

Full

14

ACCURACY

No Missing Codes

Full

Offset Error

Full

Gain Error

Full

Differential Nonlinearity (DNL) Full

25°C

Integral Nonlinearity (INL)1

Full

25°C

TEMPERATURE DRIFT

Offset Error

Full

Gain Error

Full

INPUT REFERRED NOISE

VREF = 1.75 V

25°C

ANALOG INPUT

Input Span

Full

Input Capacitance2

Full

Input Resistance3

Full

Input Common-Mode Voltage Full

POWER SUPPLIES

Supply Voltage

AVDD

Full

1.7

DRVDD

Full

1.7

DVDD

Full

1.7

Supply Current

IAVDD

Full

IDRVDD + IDVDD

Full

POWER CONSUMPTION

Sine Wave Input

Full

Standby Power4

Full

Power-Down Power5

Full

AD9683-170

Typ

Max

Min

14

Guaranteed

±9

−6.6/−0.3

±0.8

±0.5

±1.6

±0.8

±7

±13

1.38

1.75

2.5

20

0.9

1.8

1.9

1.7

1.8

1.9

1.7

1.8

1.9

1.7

135

151

68

73

365

403

221

9

AD9683-250

Typ

Max

Unit

Bits

Guaranteed

±9

−5.3/+1.2

±0.75

±0.5

±2.7

±1.5

mV

%FSR

LSB

LSB

LSB

LSB

±7

ppm/°C

±39

ppm/°C

1.42

LSB rms

1.75

V p-p

2.5

pF

20

kΩ

0.9

V

1.8

1.9

V

1.8

1.9

V

1.8

1.9

V

149

163

mA

92

97

mA

434

468

mW

266

mW

9

mW

1 Measured with a low input frequency, full-scale sine wave.

2 Input capacitance refers to the effective capacitance between one differential input pin and its complement.

3 Input resistance refers to the effective resistance between one differential input pin and its complement.

4 Standby power is measured with a low input frequency, full-scale sine wave, and the CLK± pins active. Address 0x08 is set to 0x20, and the PDWN pin is asserted.

5 Power-down power is measured with a low input frequency, a full-scale sine wave, RFCLK pulled high, and the CLK± pins active. Address 0x08 is set to 0x00, and the

PDWN pin is asserted.

Rev. 0 | Page 4 of 44

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