AD9548(Rev0) Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD9548 Datasheet PDF : 112 Pages
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AD9548
REFERENCE INPUTS (REFA/REFAA TO REFD/REFDD)
Table 8.
Parameter
DIFFERENTIAL OPERATION
Frequency Range
Sinusoidal Input
LVPECL Input
LVDS Input
Minimum Input Slew Rate
Min
Typ
10
1
1
40
Common-Mode Input Voltage
2
Differential Input Voltage Sensitivity
±65
Input Resistance
25
Input Capacitance
3
Max
Unit
Test Conditions/Comments
750
MHz
750 × 106 Hz
750 × 106 Hz
V/μs
V
mV
kΩ
pF
Minimum limit imposed for jitter
performance
Internally generated
Minimum differential voltage across
pins required to ensure switching
between logic levels; the
instantaneous voltage on either pin
must not exceed the supply rails
Minimum Pulse Width High
Minimum Pulse Width Low
SINGLE-ENDED OPERATION
Frequency Range (CMOS)
Minimum Input Slew Rate
Input Voltage High (VIH)
1.2 V to 1.5 V Threshold Setting
1.8 V to 2.5 V Threshold Setting
3.0 V to 3.3 V Threshold Setting
Input Voltage Low (VIL)
1.2 V to 1.5 V Threshold Setting
1.8 V to 2.5 V Threshold Setting
3.0 V to 3.3 V Threshold Setting
Input Resistance
Input Capacitance
Minimum Pulse Width High
Minimum Pulse Width Low
620
620
1
40
0.9
1.2
1.9
45
3
1.5
1.5
ps
ps
250 ×106 Hz
V/μs
V
V
V
0.27
V
0.5
V
1.0
V
kΩ
pF
ns
ns
Minimum limit imposed for jitter
performance
REFERENCE MONITORS
Table 9.
Parameter
Min
Typ
REFERENCE MONITORS
Reference Monitor
Loss of Reference Detection
Time
Frequency Out-of Range Limits 9.54 × 10−7
Validation Timer
0.001
Redetect Timer
0.001
Max
1.2
0.1
65.535
65.535
Unit Test Conditions/Comments
sec
Δf/fREF
sec
sec
Calculated using the nominal phase detector period
(NPDP = R/fREF)1
Programmable (lower bound subject to quality of SYSCLK)
Programmable in 1 ms increments
Programmable in 1 ms increments
1 fREF is the frequency of the active reference; R is the frequency division factor determined by the R-divider.
Rev. 0 | Page 7 of 112
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