AD9540(Rev0) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Fabricante

AD9540
(Rev.:Rev0)

655 MHz Low Jitter Clock Generator

Analog Devices 

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AD9540

48 47 46 45 44 43 42 41 40 39 38 37

AGND 1

AVDD 2

AGND 3

AVDD 4

IOUT 5

IOUT 6

AVDD 7

AGND 8

I/O_RESET 9

RESET 10

DVDD 11

DGND 12

PIN 1

INDICATOR

AD9540

TOP VIEW

(Not to Scale)

36 CP

35 VCP

34 AGND

33 OUT0

32 OUT0

31 VCML

30 AGND

29 CLK1

28 CLK1

27 AVDD

26 AGND

25 DVDD

13 14 15 16 17 18 19 20 21 22 23 24

Figure 3. 48-Lead LFCSP Pin Configuration

NOTE: The exposed paddle on this package is an electrical connection (Pin 49) as well as a thermal enhancement. For the device to

function properly, the paddle must be attached to analog ground.

Rev. 0 | Page 11 of 32

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