AD9525 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD9525 Datasheet PDF : 48 Pages
| |||
AD9525
Data Sheet
Parameter
POWER DELTAS, INDIVIDUAL FUNCTIONS
M Divider On/Off
P Divider On/Off
B Divider On/Off
REFB On
PLL On/Off
One Channel, One Driver
One Channel, Two Drivers
Min Typ Max Unit
5
8.7 mW
3
5.7 mW
16 23.1 mW
15 25 mW
254 300.5 mW
107 132 mW
184 233 mW
Test Conditions/Comments
Power delta when a function is enabled/disabled
M divider bypassed
P divider bypassed
B divider bypassed
Delta from powering down REFB differential input
PLL off to PLL on, normal operation; no reference
enabled
No LVPECL output on to one LVPECL output on
at 2949.12 MHz; same output pair
No LVPECL output on to two LVPECL outputs on
at 2949.12 MHz; same output pair
REFA AND REFB INPUT CHARACTERISTICS
Table 4.
Parameter
DIFFERENTIAL MODE (REFA, REFA; REFB, REFB)
Input Frequency
Input Sensitivity
Self-Bias Voltage, REFA and REFB
Self-Bias Voltage, REFA and REFB
Input Resistance, REFA and REFB
Input Resistance, REFA and REFB
DUTY CYCLE
Pulse Width Low
Pulse Width High
Min Typ Max Unit Test Conditions/Comments
Differential mode (can accommodate single-
ended input by ac grounding unused input)
0
500 MHz Frequencies below ~1 MHz should be dc-coupled;
be careful to match self-bias voltage
200
mV p-p Frequency at 122.88 MHz
1.52 1.65 1.78 V
Self-bias voltage of REFA and REFB inputs1
1.38 1.50 1.61 V
Self-bias voltage of REFA and REFB inputs1
4.5 4.7 4.9 kΩ
4.9 5.2 5.4 kΩ
Self-biased1
Self-biased1
Duty cycle bounds are set by pulse width high and
pulse width low
500
ps
500
ps
1 The differential pairs of REFA and REFA, REFB and REFB self-bias points are offset slightly to avoid chatter on an open input condition.
REFC INPUT CHARACTERISTICS
Table 5.
Parameter
REFC INPUT
Input Frequency Range
Input High Voltage
Input Low Voltage
Input Current
Duty Cycle
Pulse Width Low
Pulse Width High
Min Typ Max Unit
2.0
1
300 MHz
V
0.8 V
µA
1
ns
1
ns
Test Conditions/Comments
DC-coupled input (not self-biased)
Duty cycle bounds are set by pulse width high and
pulse width low
Rev. A | Page 4 of 48
Share Link: 