AD9237BCP-65EB Ver la hoja de datos (PDF) - Analog Devices

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Fabricante

AD9237BCP-65EB

12-Bit, 20 MSPS/40 MSPS/65 MSPS 3 V Low Power A/D Converter

Analog Devices 

AD9237

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

MODE2 1

CLK 2

OE 3

PDWN 4

GC 5

DNC 6

D0 (LSB) 7

D1 8

PIN 1

INDICATOR

AD9237

TOP VIEW

(Not to Scale)

24 VREF

23 SENSE

22 MODE

21 OTR

20 D11 (MSB)

19 D10

18 D9

17 D8

DNC = DO NOT CONNECT

Figure 3. Pin Configuration

Table 6. Pin Function Descriptions

Pin Number

Mnemonic

1

MODE2

2

CLK

3

OE

4

PDWN

5

GC

6

DNC

7 to 14, 17 to 20 D0 (LSB) to D11 (MSB)

15

DGND

16

DRVDD

21

22

23

24

25

26

27, 32

OTR

MODE

SENSE

VREF

REFB

REFT

AVDD

28, 31

29

30

AGND

VIN+

VIN−

Description

SHA Gain Select and Power Scaling Control (see Table 8).

Clock Input Pin.

Output Enable Pin (Active Low).

Power-Down Function Selection (see Table 9).

Gray Code Control (Active High).

Do Not Connect.

Data Output Bits.

Digital Output Ground.

Digital Output Driver Supply. Must be decoupled to DGND with a minimum 0.1 μF capacitor.

Recommended decoupling is 0.1 μF in parallel with 10 μF.

Out-of-Range Indicator.

Data Format and Clock Duty Cycle Stabilizer (DCS) Mode Selection (see Table 10).

Reference Mode Selection (see Table 7).

Voltage Reference Input/Output (see Table 7).

Differential Reference (−). Must be decoupled to REFT with a minimum 10 μF capacitor.

Differential Reference (+).

Analog Power Supply. Must be decoupled to AGND with a minimum 0.1 μF capacitor.

Recommended decoupling is 0.1 μF in parallel with 10 μF.

Analog Ground.

Analog Input Pin (+).

Analog Input Pin (−).

Rev. 0 | Page 8 of 28

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