AD9231BCPZ-20 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Fabricante

AD9231BCPZ-20

12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter

Analog Devices 

AD9231

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

General Description ......................................................................... 3

Specifications..................................................................................... 4

DC Specifications ......................................................................... 4

AC Specifications.......................................................................... 5

Digital Specifications ................................................................... 6

Switching Specifications .............................................................. 7

Timing Specifications .................................................................. 8

Absolute Maximum Ratings............................................................ 9

Thermal Characteristics .............................................................. 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Typical Performance Characteristics ........................................... 12

AD9231-80 .................................................................................. 12

AD9231-65 .................................................................................. 14

AD9231-40 .................................................................................. 15

AD9231-20 .................................................................................. 16

Equivalent Circuits ......................................................................... 17

Theory of Operation ...................................................................... 19

ADC Architecture ...................................................................... 19

Analog Input Considerations.................................................... 19

REVISION HISTORY

9/2016—Rev. A to Rev. B

Changes to Figure 3 .......................................................................... 7

6/2010—Rev. 0 to Rev. A

Changes to Features Section............................................................ 1

10/2009—Revision 0: Initial Version

Data Sheet

Voltage Reference ....................................................................... 22

Clock Input Considerations...................................................... 23

Channel/Chip Synchronization................................................ 25

Power Dissipation and Standby Mode .................................... 25

Digital Outputs ........................................................................... 26

Timing ......................................................................................... 26

Built-In Self-Test (BIST) and Output Test .................................. 27

Built-In Self-Test (BIST)............................................................ 27

Output Test Modes..................................................................... 27

Serial Port Interface (SPI).............................................................. 28

Configuration Using the SPI..................................................... 28

Hardware Interface..................................................................... 29

Configuration Without the SPI ................................................ 29

SPI Accessible Features.............................................................. 29

Memory Map .................................................................................. 30

Reading the Memory Map Register Table............................... 30

Open Locations .......................................................................... 30

Default Values ............................................................................. 30

Memory Map Register Table..................................................... 31

Memory Map Register Descriptions........................................ 33

Applications Information .............................................................. 34

Design Guidelines ...................................................................... 34

Outline Dimensions ....................................................................... 35

Ordering Guide .......................................................................... 35

Rev. B | Page 2 of 36

Share Link: